Re: [PATCH] c++: Fix folding of non-dependent BASELINKs [PR95468]

2021-02-13 Thread Patrick Palka via Gcc-patches
On Fri, 12 Feb 2021, Patrick Palka wrote: > Here, the problem ultimately seems to be that tsubst_copy_and_build, > when called with empty args as we do during non-dependent expression > folding, doesn't touch BASELINKs at all: it delegates to tsubst_copy > which then immediately exits early due

[PATCH] libiberty: autogenerate aclocal.m4

2021-02-13 Thread Mike Frysinger via Gcc-patches
Move custom macros to acinclude.m4 so we can autogenerate aclocal.m4 with aclocal. This matches every other project in the tree. libiberty/ChangeLog: * Makefile.in (ACLOCAL, ACLOCAL_AMFLAGS, $(srcdir)/aclocal.m4): Define. (configure_deps): Rename to ... (aclocal_deps):

[PATCH] handle bad __dynamic_cast more gracefully (PR 99074)

2021-02-13 Thread Martin Sebor via Gcc-patches
The test case in PR 99074 invokes dynamic_cast with the this pointer in a non-static member function called on a null pointer. The call is, of course, undefined and other different circumstances would be diagnosed by -Wnonnull. Unfortunately, in the test case, the null pointer is the result of

[Patch] Fortran: Fix ubound simplifcation [PR99027]

2021-02-13 Thread Tobias Burnus
The problem which accessing dim= for an expression is that when the argument is an array, dim= and expr->rank are relative to the resulting array – but the array-ref also contains the DIMEN_ELEMENT which does not count for dim=/rank. OK for the trunk? (Reported against GCC 11, but I wonder

[PATCH] RISC-V: Avoid zero/sign extend for volatile loads. Fix for 97417.

2021-02-13 Thread Jim Wilson
From: Levy Hsu This expands sub-word loads as a zero/sign extended load, followed by a subreg. This helps eliminate unnecessary zero/sign extend insns after the load, particularly for volatiles, but also in some other cases. Testing shows that it gives consistent code size decreases. Tested

[PATCH] RISC-V: Shorten memrefs improvement, partial fix 97417.

2021-02-13 Thread Jim Wilson
We already have a check for riscv_shorten_memrefs in riscv_address_cost. This adds the same check to riscv_rtx_costs. Making this work also requires a change to riscv_compressed_lw_address_p to work before reload by checking the offset and assuming any pseudo reg is OK. Testing shows that this

Re: [Patch] Fortran: Fix coarray handling for gfc_dep_resolver [PR99010] (was: Re: [Patch] Fortran: Fix Array dependency with local coarrays [PR98913]

2021-02-13 Thread Tobias Burnus
*PIN* On 09.02.21 12:52, Tobias Burnus wrote: Hi all, hi Thomas, On 02.02.21 18:15, Tobias Burnus wrote: I think I will do a combination: If 'identical' is true, I think I cannot remove it. If it is false, it can be identical or nonoverlapping – which makes sense. Well, it turned out that

Re: Patch for PR analyzer/98797

2021-02-13 Thread brian.sobulefsky via Gcc-patches
Hi, answers below. Note, do you want my resubmitted patch to be with commit --amend, and therefore relative to "real" commits in the history, or do you want me to chain it onto the last submission? I have already sent to assign at gnu for the form. I will update the commit message to call it s3

Re: [PATCH] passes: Enable split4 with selective scheduling 2 [PR98439]

2021-02-13 Thread Richard Biener
On February 13, 2021 4:07:03 PM GMT+01:00, Jakub Jelinek wrote: >On Sat, Feb 13, 2021 at 02:54:38PM +0100, Richard Biener wrote: >> Ok. But if required splitting is an IL property maybe we can see sth >like >> RTL_split_insns, clear it from passes like selsched and gate split on >the >>

Re: [PATCH] passes: Enable split4 with selective scheduling 2 [PR98439]

2021-02-13 Thread Jakub Jelinek via Gcc-patches
On Sat, Feb 13, 2021 at 02:54:38PM +0100, Richard Biener wrote: > Ok. But if required splitting is an IL property maybe we can see sth like > RTL_split_insns, clear it from passes like selsched and gate split on the > property and not being present? I guess better would be to track it after

Re: [PATCH] passes: Enable split4 with selective scheduling 2 [PR98439]

2021-02-13 Thread Richard Biener
On February 13, 2021 9:58:58 AM GMT+01:00, Jakub Jelinek wrote: >Hi! > >As mentioned in the PR, we have 5 split passes (+ splitting during >final). >split1 is before RA and is unconditional, >split2 is after RA and is gated on optimize > 0, >split3 is before sched2 and is gated on

Re: [PATCH 2/2] sparc: Run SUBTARGET_INIT_BUILTINS if it exists

2021-02-13 Thread coypu--- via Gcc-patches
I hope that writing the detailed commit message will encourage someone with better knowledge of GCC internals to point out a better place for this logic. I can follow through with any suggestions :) On Sat, Feb 13, 2021 at 12:20:30PM +, Maya Rashish wrote: > Some subtargets don't provide the

[PATCH 2/2] sparc: Run SUBTARGET_INIT_BUILTINS if it exists

2021-02-13 Thread Maya Rashish via Gcc-patches
Some subtargets don't provide the canonical function names as the symbol name in C libraries, and libcalls will only work if the builtins are patched to emit the correct library name. For example, on NetBSD, cabsl has the symbol name __c99_cabsl, and the patching is done via netbsd_patch_builtin.

[PATCH 1/2] aarch64: Run SUBTARGET_INIT_BUILTINS if it exists

2021-02-13 Thread Maya Rashish via Gcc-patches
Some subtargets don't provide the canonical function names as the symbol name in C libraries, and libcalls will only work if the builtins are patched to emit the correct library name. For example, on NetBSD, cabsl has the symbol name __c99_cabsl, and the patching is done via netbsd_patch_builtin.

Re: [PATCH] i386: Add combiner splitter to optimize V2SImode memory rotation [PR96166]

2021-02-13 Thread Jakub Jelinek via Gcc-patches
On Sat, Feb 13, 2021 at 09:59:57AM +0100, Uros Bizjak wrote: > BTW: I wonder if this optimization triggers frequently, the code in > the PR looks quite useful. On my next bootstrap/regtest I can gather some statistics. Jakub

[PATCH] match.pd: Fix up A % (cast) (pow2cst << B) simplification [PR99079]

2021-02-13 Thread Jakub Jelinek via Gcc-patches
Hi! The (mod @0 (convert?@3 (power_of_two_cand@1 @2))) simplification uses tree_nop_conversion_p (type, TREE_TYPE (@3)) condition, but I believe it doesn't check what it was meant to check. On convert?@3 TREE_TYPE (@3) is not the type of what it has been converted from, but what it has been

Re: [PATCH] i386: Add combiner splitter to optimize V2SImode memory rotation [PR96166]

2021-02-13 Thread Uros Bizjak via Gcc-patches
On Sat, Feb 13, 2021 at 9:47 AM Jakub Jelinek wrote: > > Hi! > > Since the x86 backend enabled V2SImode vectorization (with > TARGET_MMX_WITH_SSE), slp vectorization can kick in and emit > movq(%rdi), %xmm1 > pshufd $225, %xmm1, %xmm0 > movq%xmm0, (%rdi) > instead

[PATCH] passes: Enable split4 with selective scheduling 2 [PR98439]

2021-02-13 Thread Jakub Jelinek via Gcc-patches
Hi! As mentioned in the PR, we have 5 split passes (+ splitting during final). split1 is before RA and is unconditional, split2 is after RA and is gated on optimize > 0, split3 is before sched2 and is gated on defined(INSN_SCHEDULING) && optimize > 0 && flag_schedule_insns_after_reload split4

[PATCH] i386: Add combiner splitter to optimize V2SImode memory rotation [PR96166]

2021-02-13 Thread Jakub Jelinek via Gcc-patches
Hi! Since the x86 backend enabled V2SImode vectorization (with TARGET_MMX_WITH_SSE), slp vectorization can kick in and emit movq(%rdi), %xmm1 pshufd $225, %xmm1, %xmm0 movq%xmm0, (%rdi) instead of rolq$32, (%rdi) we used to emit (or emit when slp