On Sat, 12 Feb 2022, H.J. Lu via Gcc-patches wrote:
> + Always use GOT to access external data and function symbols via
> + -mno-direct-extern-access.
Maybe say "global offset table (GOT)"?
And at first I was confused reading this, so I suggest something like
"...when the new -mno-direct
---
htdocs/gcc-12/changes.html | 3 +++
1 file changed, 3 insertions(+)
diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
index b6341fda..897de8ef 100644
--- a/htdocs/gcc-12/changes.html
+++ b/htdocs/gcc-12/changes.html
@@ -399,6 +399,9 @@ a work-in-progress.
Add CS prefix t
On Fri, Feb 11, 2022 at 9:43 PM Hongtao Liu wrote:
>
> On Thu, Feb 10, 2022 at 9:58 PM H.J. Lu via Gcc-patches
> wrote:
> >
> > 1. Require linker with GNU_PROPERTY_1_NEEDED support for PR 35513
> > run-time tests.
> > 2. Compile pr35513-8.c to scan assembly code.
> >
> > PR testsuite/1044
> Am 12.02.2022 um 10:08 schrieb Jakub Jelinek via Gcc-patches
> :
>
> Hi!
>
> With -fstack-check=generic __builtin_alloca* can throw and the asan
> instrumentation of this builtin wasn't prepared for that case.
> The following patch fixes that by replacing the builtin with the
> replacement
2022-02-12 Uroš Bizjak
gcc/ChangeLog:
PR target/79754
* config/i386/i386.cc (type_natural_mode):
Skip decimal float vector modes.
gcc/testsuite/ChangeLog:
PR target/79754
* gcc.target/i386/pr79754.c: New test.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32
On Sat, Feb 12, 2022 at 10:02 AM Jakub Jelinek wrote:
>
> Hi!
>
> The following testcase ICEs, because AVX512F is enabled, AVX512VL is not,
> and the cvtsd2ss insn has %xmm0-15 as output operand and %xmm16-31 as
> input operand. For output operand %xmm16+ the splitter just gives up
> in such case
Hi!
With -fstack-check=generic __builtin_alloca* can throw and the asan
instrumentation of this builtin wasn't prepared for that case.
The following patch fixes that by replacing the builtin with the
replacement builtin and emitting any further insns on the fallthru
edge.
I haven't touched the hw
Hi!
The following testcase ICEs, because AVX512F is enabled, AVX512VL is not,
and the cvtsd2ss insn has %xmm0-15 as output operand and %xmm16-31 as
input operand. For output operand %xmm16+ the splitter just gives up
in such case, but for such input it just emits vmovddup which requires
AVX512VL
On Fri, 11 Feb 2022, Jeff Law wrote:
> > If MIPS MCU extension is enable, the IPL section in Cause register
> > has been expand to 8bit instead of 6bit.
> >
> > gcc/ChangeLog:
> >
> > * config/mips/mips.cc (mips_expand_prologue):
> > IPL is 8bit for MCU ASE.
> OK
But this is still wr
On 2/11/22 07:35, Richard Sandiford wrote:
Dan Li writes:
On 2/11/22 01:53, Richard Sandiford wrote:
Dan Li writes:
On 2/10/22 01:55, Richard Sandiford wrote:
And I think maybe we could handle this through three patches:
1.Keep current patch (a V5) unchanged for scs.
2.Add shrink-warpp
Shadow Call Stack can be used to protect the return address of a
function at runtime, and clang already supports this feature[1].
To enable SCS in user mode, in addition to compiler, other support
is also required (as discussed in [2]). This patch only adds basic
support for SCS from the compiler
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