[PATCH] PR c++/84964: Middle-end patch to expand_call for ICE after sorry.

This patch resolves PR c++/84964 which is an ICE in the middle-end after emitting a "sorry, unimplemented" message, and is a regression from earlier releases of GCC. This issue is that after encountering a function call requiring an unreasonable amount of stack space, the code continues and

[PATCH] libatomic: Improve 16-byte atomics on Intel AVX [PR104688]

Hi! As mentioned in the PR, the latest Intel SDM has added: "Processors that enumerate support for Intel® AVX (by setting the feature flag CPUID.01H:ECX.AVX[bit 28]) guarantee that the 16-byte memory operations performed by the following instructions will always be carried out atomically: •

[PATCH] rs6000/test: Adjust p9-vec-length-7 sensitive to unroll [PR103196]

Hi, As PR103196 shows, p9-vec-length-full-7.c needs to be adjusted as the complete unrolling can happen on some of its loops. This patch is to use pragma "GCC unroll 0" to disable all possible loop unrollings. Hope it can help the case not that fragile. There are some other p9-vec-length*

[PATCH, rs6000] Correct match pattern in pr56605.c

Hi, This patch corrects the match pattern in pr56605.c. The former pattern is wrong and test case fails with GCC11. It should match following insn on each subtarget after mode promotion is disabled. The patch need to be backported to GCC11. //gimple _17 = (unsigned int) _20;

Re: [PATCH v7 11/12] LoongArch Port: gcc/testsuite

Thanks,  speculation barrier is not needed for loongarch. I have removed the warning. 在 2022/2/25 上午3:32, Xi Ruoyao 写道: On Sat, 2022-02-12 at 11:11 +0800, xucheng...@loongson.cn wrote: From: chenglulu 2022-02-12  Chenghua Xu      Lulu Cheng  gcc/testsuite/ spec-barrier tests

Re: [PATCH] AVX512F: Add helper enumeration for ternary logic intrinsics.

On Fri, Feb 25, 2022 at 4:44 PM Hongyu Wang via Gcc-patches wrote: > > Hi, > > This patch intends to sync with llvm change in > https://reviews.llvm.org/D120307 to add enumeration and truncate This will be documented in intel intrinsic guide. > imm to unsigned char, so users could use ~ on

[pushed] c++: (*(fn))() [PR104618]

The patch for PR90451 deferred marking to the point of actual use; we missed this one because of the parens. Tested x86_64-pc-linux-gnu, applying to trunk. PR c++/104618 gcc/cp/ChangeLog: * typeck.cc (cp_build_addr_expr_1): Also maybe_undo_parenthesized_ref.

[COMMITTED] hpux: New include hack to fix declarations of _DINFINITY, _SINFINITY and _SQNAN

The declarations of _DINFINITY, _SINFINITY and _SQNAN need to be constant expressions. Committed to trunk. Dave --- 2022-02-27 John David Anglin fixincludes/ChangeLog: * inclhack.def (hpux_math_constexpr): New hack. * fixincl.x: Regenerate. * tests/base/math.h:

New Swedish PO file for 'gcc' (version 12.1-b20220213)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Swedish team of translators. The file is available at: https://translationproject.org/latest/gcc/sv.po (This file,

[PATCH] PR middle-end/80270: ICE in extract_bit_field_1

This patch fixes PR middle-end/80270, an ICE-on-valid regression, where performing a bitfield extraction on a variable explicitly stored in a hard register by the user causes a segmentation fault during RTL expansion. Nearly identical source code without the "asm" qualifier compiles fine. The