Hi,
This patch adds V1TI mode into a new mode iterator used in vector
comparison expands.Without the patch, the comparisons between two vector
__int128 are converted to scalar comparisons with branches. The code is
suboptimal.The patch fixes the issue. Now all comparisons between two
vector __in
> > > Would it be better to use vmovss under avx512vl without & 1 for mask.
> >
> > vmovss clears the upper bits, but the intrinsic requires src1. We
> > still need either a mask move or blend for the high part.
> not for __m128 _mm_mask_move_ss (__m128 src, __mmask8 k, __m128 a, __m128 b)
> https:
Hi!
Apparently clang has a -fgnuc-version= option which allows it to pretend
it is any GCC version the user likes. It is already bad that it claims to
be GCC 4.2 compatible by default when it is not (various unimplemented
extensions at least), but this option is a horrible idea.
Anyway, this pat
hello,
I know it's too much.
we fixed the functions' names that are not part of the standard form ompd_
* prefix to gompd_
Thanks
On Wed, Mar 16, 2022 at 5:48 AM Mohamed Atef
wrote:
> Hi,
>we found some typos in the ChangeLog and some wrong spaces (nightmare)
> in the files.
> So here's
fpu-glibc name is a bit incorrect, since it also works on other systems.
I have verified that it builds and can also build other packages
correctly (that were failing before).
From 0feb83fae30070cf250781449670638d7addd947 Mon Sep 17 00:00:00 2001
From: Piotr Kubaj
Date: Sun, 20 Mar 2022 13:03:13 +
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the Swedish team of translators. The file is available at:
https://translationproject.org/latest/gcc/sv.po
(This file, 'gcc-12.1-b20220213.sv.po'
> From: Piotr Kubaj
> Date: Sun, 20 Mar 2022 13:03:13 +0100
> Subject: [PATCH] fortran: on powerpc*-unknown-freebsd*, also use fpu-glibc
>
> It builds fine and correctly bulds packages on FreeBSD.
> It looks like "fpu-glibc" name is a bit misleading since it also works
> on FreeBSD.
>
> Signed-o
Hi,
(Please send all Fortran (front-end and libgfortran) patches in CC to the
Fortran list.)
Please hold from pushing the patch as is, I have some questions:
- If FreeBSD has feenableexcept() and related functions, it should already use
the fpu-glibc code, because of this:
if test "x${have_fe
Recent changes twiddled the output for s390/arch13/sel-1.c causing
testsuite failures. As far as I can tell both sequences are equivalent
from a performance standpoint. This patch changes the test to accept
both forms.
Installed on the trunk,
Jeff
commit 6f30c4cd38b8385d62358065d795df590e7
Thanks, this addresses most of my comments from the v8 review.
There were a couple left over though:
chenglulu writes:
> +(define_attr "compression" "none,all"
> + (const_string "none"))
I still don't understand the purpose of keeping this for LoongArch.
> +(define_insn "truncdisi2_extended"
>
rtl-ssa chains definitions into an RPO list. It also groups
sequences of clobbers together into a single node, so that it's
possible to skip over the clobbers in constant time in order to
get the next or previous set.
When adding a clobber to an insn, the main DF barriers for that
clobber are the
On Sat, Mar 19, 2022 at 8:06 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> This patch fixes typo in subst for scalar complex mask_round operand.
>
> Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde.
>
> Ok for master?
>
Ok.
> gcc/ChangeLog:
>
> PR target/104977
> * c
On Sat, Mar 19, 2022 at 8:09 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> For complex scalar intrinsic like _mm_mask_fcmadd_sch, the
> mask should be and by 1 to ensure the mask is bind to lowest byte.
>
> Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde.
>
> Ok for master?
>
> gcc
> Would it be better to use vmovss under avx512vl without & 1 for mask.
vmovss clears the upper bits, but the intrinsic requires src1. We
still need either a mask move or blend for the high part.
LLVM generates mask & 1 for these intrinsics.
Hongtao Liu via Gcc-patches 于2022年3月21日周一 09:08写道：
>
On Mon, Mar 21, 2022 at 9:22 AM Hongyu Wang wrote:
>
> > Would it be better to use vmovss under avx512vl without & 1 for mask.
>
> vmovss clears the upper bits, but the intrinsic requires src1. We
> still need either a mask move or blend for the high part.
not for __m128 _mm_mask_move_ss (__m128 s
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