On Fri, Jul 29, 2022 at 12:34 PM Takayuki 'January June' Suwa
wrote:
>
> The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
> (although exception handling and sibling call may not apply at the same time,
> but for safety)
>
> gcc/ChangeLog:
>
> *
On Fri, Jul 29, 2022 at 12:34 PM Takayuki 'January June' Suwa
wrote:
>
> It takes one machine instruction for both condtional branch and move.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (xtensa_rtx_costs):
> Add new case for IF_THEN_ELSE.
> ---
> gcc/config/xtensa/xtensa.cc
在 2022/7/30 上午1:17, Xi Ruoyao 写道:
Change v2 to v3:
- Disable section anchor for addr_global symbols.
- Use -O2 in test to make sure section anchor is disabled.
--
Background:
On Fri, 2022-07-29 at 21:59 +0530, Immad Mir wrote:
> This patch extends the state machine in sm-fd.cc to support
> creat, dup, dup2 and dup3 functions.
Thanks for the patch.
Please can you use PR 106298 for this (in the ChangeLog and subject
line), rather than 106300, as it's more specific.
Hi Mikael,
Am 29.07.22 um 22:36 schrieb Mikael Morin:
Indeed, I overlooked that, but my opinion remains that we shouldn’t play
with fixed vs free form considerations here.
So the options I can see are:
- handle the locus in get_kind; we do it a lot already in matching
functions, so it
Le 29/07/2022 à 21:59, Harald Anlauf via Fortran a écrit :
Am 29.07.22 um 13:11 schrieb Mikael Morin:
> and use gfc_next_char instead of gfc_match_char
in get_kind.
There is one important functionality in gfc_match_char(): it manages
the locus. We would need then to add this explicitly to
On Fri, Jul 29, 2022 at 06:03:18PM +0100, Andrew Stubbs wrote:
> On 29/07/2022 16:59, Jakub Jelinek wrote:
> > Doing the fold_convert seems to be a wasted effort to me.
> > Can't this be done conditional on whether some change is needed at all
> > and just using gimple_build_assign with NOP_EXPR,
Am 28.07.22 um 22:19 schrieb Mikael Morin:
Hello,
Le 27/07/2022 à 21:45, Harald Anlauf via Fortran a écrit :
ok, I have thought about your comments in the review process,
and played with the Cray compiler. Attached is a refined version
of the patch that now rejects in addition these cases for
Hi Mikael,
Am 29.07.22 um 13:11 schrieb Mikael Morin:
Hello,
Le 28/07/2022 à 22:11, Harald Anlauf via Fortran a écrit :
Dear all,
in free-form mode, blanks are significant, so they cannot appear
in literal constants, especially not before or after the "_" that
separates the literal and the
Hi, Richard,
Thanks a lot for your comments and suggestions. (And sorry for my late reply).
> On Jul 28, 2022, at 3:26 AM, Richard Biener wrote:
>
> On Tue, 19 Jul 2022, Qing Zhao wrote:
>
>> From 3854004802b8e2f132ebf218fc35a632f5e80c6a Mon Sep 17 00:00:00 2001
>> From: Qing Zhao
>> Date:
The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
(although exception handling and sibling call may not apply at the same time,
but for safety)
gcc/ChangeLog:
* config/xtensa/xtensa.md: Change hard register number used in
the split patterns for indirect
It takes one machine instruction for both condtional branch and move.
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_rtx_costs):
Add new case for IF_THEN_ELSE.
---
gcc/config/xtensa/xtensa.cc | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/config/xtensa/xtensa.cc
Change v2 to v3:
- Disable section anchor for addr_global symbols.
- Use -O2 in test to make sure section anchor is disabled.
--
Background:
https://lore.kernel.org/loongarch/d7670b60-2782-4642-995b-7baa01779...@loongson.cn/T/#e1d47e2fe185f2e2be8fdc0784f0db2f644119379
Question: Do you have a
On 29/07/2022 16:59, Jakub Jelinek wrote:
Doing the fold_convert seems to be a wasted effort to me.
Can't this be done conditional on whether some change is needed at all
and just using gimple_build_assign with NOP_EXPR, so something like:
I'm just not familiar enough with this stuff to run
This patch extends the state machine in sm-fd.cc to support
creat, dup, dup2 and dup3 functions.
Lightly tested on x86_64 Linux.
gcc/analyzer/ChangeLog:
PR analyzer/106300
* sm-fd.cc (fd_state_machine::on_open): Add
creat, dup, dup2 and dup3 functions.
(enum dup):
On Fri, Jul 29, 2022 at 04:53:51PM +0100, Andrew Stubbs wrote:
> This patch adjusts the generation of SIMD "inbranch" clones that use integer
> masks to ensure that it vectorizes on amdgcn.
>
> The problem was only that an amdgcn mask is DImode and the shift amount was
> SImode, and the
This patch adjusts the generation of SIMD "inbranch" clones that use
integer masks to ensure that it vectorizes on amdgcn.
The problem was only that an amdgcn mask is DImode and the shift amount
was SImode, and the difference causes vectorization to fail.
OK for mainline?
Don't look at V1 patch: I selected wrong file and sent a draft with bugs
mistakenly.
Background:
https://lore.kernel.org/loongarch/d7670b60-2782-4642-995b-7baa01779...@loongson.cn/T/#e1d47e2fe185f2e2be8fdc0784f0db2f644119379
Question: Do you have a better name than "addr_global"?
Alternatives:
> On Jul 28, 2022, at 3:28 AM, Richard Biener wrote:
>
> On Tue, 19 Jul 2022, Qing Zhao wrote:
>
>> From a09f39ded462611286a44d9e8273de8342673ba2 Mon Sep 17 00:00:00 2001
>> From: Qing Zhao
>> Date: Mon, 18 Jul 2022 18:12:26 +
>> Subject: [PATCH 2/2] Use new flag DECL_NOT_FLEXARRAY in
Background:
https://lore.kernel.org/loongarch/d7670b60-2782-4642-995b-7baa01779...@loongson.cn/T/#e1d47e2fe185f2e2be8fdc0784f0db2f644119379
Question: Do you have a better name than "addr_global"?
Alternatives:
1. Just use "-mno-explicit-relocs -mla-local-with-abs" for kernel
modules. It's
A SET operation that writes memory may have the same value as an earlier
store but if the alias sets of the new and earlier store do not conflict
then the set is not truly redundant. This can happen, for example, if
objects of different types share a stack slot.
To fix this we define a new
Hello,
the non shared library linking is complete and the gm2 driver has been
rewritten using the fortran/c++ code base. Once the shared library
scaffold is complete the focus will be on tidying up and
platform/architecture testing.
All 11.7k tests pass on amd64 and aarch64 debian
regards,
On Fri, 29 Jul 2022, Aldy Hernandez wrote:
> On Fri, Jul 29, 2022 at 11:02 AM Richard Biener wrote:
> >
> > The following makes the backward threader reject threads whose entry
> > edge is probably never executed according to the profile. That in
> > particular, for the testcase, avoids
I've committed this patch to implement V64DImode vector-vector and
vector-scalar shifts.
In particular, these are used by the SIMD "inbranch" clones that I'm
working on right now, but it's an omission that ought to have been fixed
anyway.
Andrewamdgcn: 64-bit vector shifts
Enable 64-bit
I've committed this patch to enable DImode one's-complement on amdgcn.
The hardware doesn't have 64-bit not, and this isn't needed by expand
which is happy to use two SImode operations, but the vectorizer isn't so
clever. Vector condition masks are DImode on amdgcn, so this has been
causing
On Fri, Jul 29, 2022 at 11:02 AM Richard Biener wrote:
>
> The following makes the backward threader reject threads whose entry
> edge is probably never executed according to the profile. That in
> particular, for the testcase, avoids threading the irq == 1 check
> on the path where irq > 31,
On Mon, Jul 04, 2022 at 10:34:03PM +0200, Ahmed Sayed Mousse wrote:
> *This patch is the initial implementation of OpenMP-API specs book section
> **20.5.5 with title "Thread Handles".*
Sorry for the delay, have been on vacation.
> *I have fixed the first version after revising the notes on it.*
Hello,
Le 28/07/2022 à 22:11, Harald Anlauf via Fortran a écrit :
Dear all,
in free-form mode, blanks are significant, so they cannot appear
in literal constants, especially not before or after the "_" that
separates the literal and the kind specifier.
The initial patch from Steve addressed
On Fri, 29 Jul 2022, Jakub Jelinek wrote:
> On Fri, Jul 29, 2022 at 09:57:29AM +0100, Andre Vieira (lists) via
> Gcc-patches wrote:
> > The 'only on the vectorized code path' remains the same though as vect_recog
> > also only happens on the vectorized code path right?
>
> if conversion (in
The following patch enables TSAN for mips64, on which it is supported.
Signed-off-by: Dimitrije Milosevic .
libsanitizer/ChangeLog:
* configure.tgt: Enable
TSAN for 64-bit ABIs.
---
libsanitizer/configure.tgt | 4
1 file changed, 4 insertions(+)
diff --git
On Fri, Jul 29, 2022 at 11:48:08AM +0200, Tobias Burnus wrote:
> On 29.07.22 10:03, Jakub Jelinek wrote:
> > There were 2 issues visible on this new testcase, one that we didn't have
> > special POINTER_TYPE_P handling in a few spots of expand_omp_simd ...
> > The other issue was that we put n2
On Fri, Jul 29, 2022 at 11:47:54AM +0200, Tobias Burnus wrote:
> Testcase wise, the run-time testcase libgomp.fortran/examples-4/simd-2.f90
> checks essentially the same, except that it uses an array-descriptor array
> (assumed shape) while this testcase uses an assumed-size array.
>
> I decided
On Fri, Jul 29, 2022 at 09:57:29AM +0100, Andre Vieira (lists) via Gcc-patches
wrote:
> The 'only on the vectorized code path' remains the same though as vect_recog
> also only happens on the vectorized code path right?
if conversion (in some cases) duplicates a loop and guards one copy with
an
On Fri, Jul 29, 2022 at 11:52 AM Richard Earnshaw
wrote:
>
>
>
> On 29/07/2022 08:06, Richard Biener via Gcc-patches wrote:
> > On Thu, Jul 28, 2022 at 6:46 PM Richard Earnshaw
> > wrote:
> >>
> >> [resend with correct subject line]
> >>
> >> A SET operation that writes memory may have the same
On 29/07/2022 08:06, Richard Biener via Gcc-patches wrote:
On Thu, Jul 28, 2022 at 6:46 PM Richard Earnshaw
wrote:
[resend with correct subject line]
A SET operation that writes memory may have the same value as an earlier
store but if the alias sets of the new and earlier store do not
On 29.07.22 10:03, Jakub Jelinek wrote:
There were 2 issues visible on this new testcase, one that we didn't have
special POINTER_TYPE_P handling in a few spots of expand_omp_simd ...
The other issue was that we put n2 expression directly into a
comparison in a condition and regimplified that,
Testcase wise, the run-time testcase libgomp.fortran/examples-4/simd-2.f90
checks essentially the same, except that it uses an array-descriptor array
(assumed shape) while this testcase uses an assumed-size array.
I decided for an extra compile-time only testcase, but it could be also be
moved
On Fri, 29 Jul 2022, Andre Vieira (lists) wrote:
> Hi Richard,
>
> Thanks for the review, I don't completely understand all of the below, so I
> added some extra questions to help me understand :)
>
> On 27/07/2022 12:37, Richard Biener wrote:
> > On Tue, 26 Jul 2022, Andre Vieira (lists)
Tested powerpc64le-linux, pushed to trunk.
-- >8 --
This adjusts the return type to match the resolution of LWG 3672. There
is no functional difference, because decltype(auto) always deduced a
value anyway, but this makes it simpler and consistent with the working
draft.
libstdc++-v3/ChangeLog:
Hi Richard,
Thanks for the review, I don't completely understand all of the below,
so I added some extra questions to help me understand :)
On 27/07/2022 12:37, Richard Biener wrote:
On Tue, 26 Jul 2022, Andre Vieira (lists) wrote:
I don't think this is a good approach for what you gain and
The following makes the backward threader reject threads whose entry
edge is probably never executed according to the profile. That in
particular, for the testcase, avoids threading the irq == 1 check
on the path where irq > 31, thereby avoiding spurious -Warray-bounds
diagnostics
if (irq_1(D)
The forward threader failed to check whether it can actually duplicate
blocks. The following adds this in a similar place the backwards threader
performs this check.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/106422
*
This avoids generating illegal (strict_low_part (reg ...)) RTXs. This
required two changes:
1. Do not use gen_lowpart to generate the inner expression of a
STRICT_LOW_PART. gen_lowpart might fold the SUBREG either because
there is already a paradoxical subreg or because it can directly be
Hi!
The allowed syntaxes of atomic compare don't allow ()s around the condition
of ?:, but we were accepting it in one case for C++.
Fixed thusly.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk.
2022-07-29 Jakub Jelinek
PR c++/106448
* parser.cc
Hi!
There were 2 issues visible on this new testcase, one that we didn't have
special POINTER_TYPE_P handling in a few spots of expand_omp_simd - for
pointers we need to use POINTER_PLUS_EXPR and need to have the non-pointer
part in sizetype, for non-rectangular loop on the other side we can rely
Hi!
Tobias mentioned in PR106449 that fold_build_pointer_plus already
fold_converts the second argument to sizetype if it doesn't already
have an integral type gimple compatible with sizetype.
So, this patch simplifies the callers of fold_build_pointer_plus in
omp-expand so that they don't do
Hi Segher,
> > > To implement this, and some closely related transformations, we
> > > build upon the existing val_signbit_known_clear_p predicate. In the
> > > first chunk, nonzero_bits knows that FFS and ABS can't leave the
> > > sign-bit bit set,
> >
> > Is that guaranteed in all cases?
On Thu, Jul 28, 2022 at 6:46 PM Richard Earnshaw
wrote:
>
> [resend with correct subject line]
>
> A SET operation that writes memory may have the same value as an earlier
> store but if the alias sets of the new and earlier store do not conflict
> then the set is not truly redundant. This can
在 2022/7/29 下午12:02, Lulu Cheng 写道:
The ASM_PREFERRED_EH_DATA_FORMAT macro before and after modification is as
follows:
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
- (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_absptr)
+ (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel |
Hi Segher,
> On Wed, Jul 27, 2022 at 02:42:25PM +0100, Roger Sayle wrote:
> > This patch implements some additional zero-extension and
> > sign-extension related optimizations in simplify-rtx.cc. The original
> > motivation comes from PR rtl-optimization/71775, where in comment #2
> Andrew
Thanks Martin! I'm sending out the output from git format-patch as an
attachment to this email.
From: Martin Liška
Sent: Thursday, July 28, 2022 3:48 PM
To: Dimitrije Milosevic ;
gcc-patches@gcc.gnu.org
Cc: ma...@embecosm.com ; Djordje Todorovic
; jos...@codesourcery.com
Subject: Re:
On Jul 29, 2022, Alexandre Oliva wrote:
> This patch adds the strub attribute for function and variable types,
> command-line options, passes and adjustments to implement it,
> documentation, and tests.
The entire patch, and the patchlets used for testing, are available from
the GCC git repo,
This final fragment of ipa-strub.cc adds the strub pass, that
implements the needed function interface changes and adds calls to the
strub builtins.
+/* Define a pass to introduce strub transformations. */
+const pass_data pass_data_ipa_strub = {
+ SIMPLE_IPA_PASS,
+ "strub",
+
This middle fragment of ipa-strub.cc covers strub mode selection and
assignment logic, and most of the pass that performs that assignment.
+/* Return TRUE iff NODE calls builtin va_start. */
+
+static bool
+calls_builtin_va_start_p (cgraph_node *node)
+{
+ bool result = false;
+
+ for
Bootstrapped on x86_64-unknown-linux-gnu, pushed.
* gimple-ssa-warn-restrict.cc (builtin_memref::set_base_and_offset):
Use CONVERT_EXPR_CODE_P.
---
gcc/gimple-ssa-warn-restrict.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This initial fragment of ipa-strub.cc covers strub modes and their
internal representation.
for gcc/ChangeLog
* ipa-strub.cc: New.
diff --git a/gcc/ipa-strub.cc b/gcc/ipa-strub.cc
new file mode 100644
index 0..d61b7e2e36e43
--- /dev/null
+++ b/gcc/ipa-strub.cc
@@ -0,0
This replaces vect_get_vector_types_for_stmt with get_vectype_for_scalar_type
in vect_recog_bool_pattern.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vect-patterns.cc (vect_recog_bool_pattern): Use
get_vectype_for_scalar_type instead of
Introduce the new strub passes, adjust other passes and front-end
declaration for strub.
for gcc/ChangeLog
* Makefile.in (OBJS): Add ipa-strub.o.
* ipa-inline.cc: Include ipa-strub.h.
(can_inline_edge_p): Test strub_inlinable_to_p.
* ipa-split.cc: Include
Ada already has support for the strub attributes stubbed-out, and the
front-end code already has support for them and their effects in the
type system.
for gcc/ChangeLog
* attribs.cc: Include ipa-strub.h.
(decl_attributes): Support applying attributes to function
type,
for gcc/ChangeLog
* builtins.def (BUILT_IN_STACK_ADDRESS): New.
(BUILT_IN___STRUB_ENTER): New.
(BUILT_IN___STRUB_UPDATE): New.
(BUILT_IN___STRUB_LEAVE): New.
* builtins.cc: Include ipa-strub.h.
(STACK_STOPS, STACK_UNSIGNED): Define.
for gcc/testsuite/ChangeLog
* g++.dg/strub-run1.C: New.
* g++.dg/torture/strub-init1.C: New.
* g++.dg/torture/strub-init2.C: New.
* g++.dg/torture/strub-init3.C: New.
* gnat.dg/strub_attr.adb, gnat.dg/strub_attr.ads: New.
* gnat.dg/strub_ind.adb,
for gcc/testsuite/ChangeLog
* c-c++-common/strub-O0.c: New.
* c-c++-common/strub-O1.c: New.
* c-c++-common/strub-O2.c: New.
* c-c++-common/strub-O2fni.c: New.
* c-c++-common/strub-O3.c: New.
* c-c++-common/strub-O3fni.c: New.
*
for gcc/testsuite/ChangeLog
* c-c++-common/torture/strub-callable1.c: New.
* c-c++-common/torture/strub-callable2.c: New.
* c-c++-common/torture/strub-const1.c: New.
* c-c++-common/torture/strub-const2.c: New.
* c-c++-common/torture/strub-const3.c: New.
Ada already has some strub documentation in
gcc/ada/doc/gnat_rm/security_hardening_features.rst.
for gcc/ChangeLog
* common.opt (fstrub=*): New options.
* doc/extend.texi (strub): New type attribute.
(__builtin_stack_address): New function.
(Stack Scrubbing):
On Thu, 28 Jul 2022, Kees Cook wrote:
> On Thu, Jul 28, 2022 at 07:26:57AM +, Richard Biener wrote:
> > On Tue, 19 Jul 2022, Qing Zhao wrote:
> > > [...]
> > > +@cindex @code{strict_flex_array} variable attribute
> > > +@item strict_flex_array (@var{level})
> > > +The @code{strict_flex_array}
This patch adds the strub attribute for function and variable types,
command-line options, passes and adjustments to implement it,
documentation, and tests.
Stack scrubbing is implemented in a machine-independent way: functions
with strub enabled are modified so that they take an extra stack
This patch adds rot[lr]64ti2_doubleword patterns to the x86_64 backend,
to move splitting of 128-bit TImode rotates by 64 bits after reload,
matching what we now do for 64-bit DImode rotations by 32 bits with -m32.
In theory moving when this rotation is split should have little
influence on code
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