LGTM.
You can go ahead to implement rounding mode of floating-point by mode-switching:
Suggest you implement rounding mode for floating-poing as follows:
1st step: Implement mode-switching for floating-point rounding mode except
DYNAMIC which should be totally same as fixed-point.
2nd step: Sup
> Can you push the element_mode change separately please?
OK.
> I'd like to hear more reasoning of why target_supports_op_p is wanted
> here. Doesn't target_supports_op_p return false if this is for example
> a soft-fp target? So if at all, shouldn't the test only be carried
> out if the origin
From: Ju-Zhe Zhong
Hi, Richi.
I tried to understand your last email and to refactor the do-while loop using
VECTOR_CST_NELTS.
This patch works fine for LEN_MASK_STORE and compiler can CSE redundant store.
I have appended testcase in this patch to test VN for LEN_MASK_STORE.
I am not sure whet
On Mon, 26 Jun 2023, Jan Hubicka wrote:
> Hi,
> compiling the testcase from PR109849 (which uses std:vector based stack to
> drive a loop) with profile feedbakc leads to profile mismatches introduced by
> tree-ssa-dce. This is the new code to produce unified forwarder blocks for
> PHIs.
>
> I am
On Mon, 26 Jun 2023, Robin Dapp wrote:
> Hi,
>
> this patch changes TYPE_MODE into element_mode in a match.pd
> simplification. As the simplification can be called with vector types
> real_can_shorten_arithmetic would ICE in REAL_MODE_FORMAT which
> expects a scalar mode. Therefore, use element
From: Richard Biener
Date: Monday, June 26, 2023 at 2:23 PM
To: Tejas Belagod
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [RFC] GNU Vector Extension -- Packed Boolean Vectors
On Mon, Jun 26, 2023 at 8:24 AM Tejas Belagod via Gcc-patches
wrote:
>
> Hi,
>
> Packed Boolean Vectors
> ---
On Mon, 26 Jun 2023, Qing Zhao wrote:
>
>
> > On Jun 23, 2023, at 7:27 PM, Alexandre Oliva wrote:
> >
> > On Jun 23, 2023, Qing Zhao via Gcc-patches wrote:
> >
> >> It?s better to add this definition earlier in the list of the ?three
> >> basic values?, to make it ?four basic values?, like t
Andrew Carlotti via Gcc-patches writes:
> Many intrinsics currently depend on both an architecture version and a
> feature, despite the corresponding instructions being available within
> GCC at lower architecture versions.
>
> LLVM has already removed these explicit architecture version
> depende
Yes, we have a fix patch (which has been reviewed by jakub) already but missing
testing.
And we are finding a nvdia GPU to test offload of that patch.
We will land it after we finished the test.
Thanks.
juzhe.zh...@rivai.ai
From: Li, Pan2
Date: 2023-06-27 14:15
To: Li Xu; gcc-patches@gcc.gnu
Thanks Xu for locating this, we have one similar PATCH under reviewing/testing
as below.
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622440.html
Pan
-Original Message-
From: Li Xu
Sent: Tuesday, June 27, 2023 2:12 PM
To: gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; pal...
If MAX_MACHINE_MODE exceeds 8bits, a warning will appear in the following code.
waring: writing 293 bytes into a region of size 256 overflows the destination
gcc/lto-streamer-out.cc
void
lto_output_init_mode_table (void)
{
memset (streamer_mode_table, '\0', MAX_MACHINE_MODE);
}
gcc/ChangeLog:
On Tue, Jun 27, 2023 at 8:09 AM Hongtao Liu wrote:
>
> On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
> >
> > On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> > >
> > > pass_insert_vzeroupper is under condition
> > >
> > > TARGET_AVX && TARGET_VZEROUPPER
> > > && flag_expensive_optimization
On Tue, Jun 27, 2023 at 8:08 AM Hongtao Liu wrote:
>
> On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
> >
> > On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> > >
> > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > > Ok for trunk?
> > >
> > > gcc/ChangeLog:
> > >
> > >
On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
>
> On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> >
> > pass_insert_vzeroupper is under condition
> >
> > TARGET_AVX && TARGET_VZEROUPPER
> > && flag_expensive_optimizations && !optimize_size
> >
> > But the document of mvzeroupper doesn't me
On Tue, Jun 27, 2023 at 2:05 PM Uros Bizjak wrote:
>
> On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > gcc/ChangeLog:
> >
> > PR target/82735
> > * config/i386/i386.cc (ix86_avx_u127_mode_n
From: Pan Li
According to the doc as below, we need to support the rounding mode of
the RVV floating-point, both the static and dynamice frm.
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226
For tracking and development friendly, We will take some steps to support
all rounding modes
On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
>
> pass_insert_vzeroupper is under condition
>
> TARGET_AVX && TARGET_VZEROUPPER
> && flag_expensive_optimizations && !optimize_size
>
> But the document of mvzeroupper doesn't mention the insertion
> required -O2 and above, it may confuse users whe
On Tue, Jun 27, 2023 at 7:55 AM liuhongt wrote:
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
>
> gcc/ChangeLog:
>
> PR target/82735
> * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
> vzeroupper for vzeroupper call_insn.
>
> gc
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?
gcc/ChangeLog:
PR target/82735
* config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
vzeroupper for vzeroupper call_insn.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx-vzeroupper-30.
pass_insert_vzeroupper is under condition
TARGET_AVX && TARGET_VZEROUPPER
&& flag_expensive_optimizations && !optimize_size
But the document of mvzeroupper doesn't mention the insertion
required -O2 and above, it may confuse users when they explicitly
use -Os -mvzeroupper.
mvzeroupp
Thanks, I'll backport it down to GCC10 after this passed all bootstrap/regtest.
Uros Bizjak via Gcc-patches 于2023年6月26日周一 14:05写道：
>
> On Mon, Jun 26, 2023 at 4:31 AM Hongyu Wang wrote:
> >
> > Hi,
> >
> > For function with target attribute arch=*, current logic will set its
> > tune to -mtune f
I have a patch that adds braced initializers to a GTY structure.
gengtype didn't accept that, because it parsed the "{ ... }" in
" = { ... };" as the end of a statement (as "{ ... }" would be in
a function definition) and so it didn't expect the following ";".
This patch explicitly handles initial
At the rtl level, we cannot guarantee that the maskstore is not optimized
to other full-memory accesses, as the current implementations are equivalent
in terms of pattern, to solve this potential problem, this patch refines
the pattern of the maskstore and the intrinsics with unspec.
One thing I'm
On Mon, Jun 26, 2023 at 4:54 PM liuhongt wrote:
>
> __bfloat16 is redefined from typedef short to real __bf16 since GCC
> V13. The patch issues an warning for potential silent implicit
> conversion between __bf16 and short where users may only expect a
> data movement.
>
> To avoid too many false
On Tue, Jun 20, 2023 at 5:34 PM Hongtao Liu wrote:
>
> On Tue, Jun 20, 2023 at 5:03 PM Jan Beulich wrote:
> >
> > On 20.06.2023 10:33, Hongtao Liu wrote:
> > > On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
> > > wrote:
> > >>
> > >> I guess the underlying pattern, going along the l
The manual references asm goto as being implicitly volatile already
and that was done when asm goto could not have outputs. When outputs
were added to `asm goto`, only asm goto without outputs were still being
marked as volatile. Now some parts of GCC decide, removing the `asm goto`
is ok if the ou
There is a missing space between the return type and the name
which causes the name not to be outputted in the html docs.
Committed as obvious after building html docs.
gcc/ChangeLog:
* doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
defbuiltin usage.
---
gcc/doc/exte
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Tuesday, June 27, 2023 7:50 AM
To: juzhe.zhong
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; kito.ch...@sifive.com;
pal...@dabbelt.com; pal...@rivosinc.com; rdapp@gmai
On 6/26/23 17:36, juzhe.zhong wrote:
Yes. I found the “return” is redundant so I removed it.
OK. Just wanted to be sure.
OK for the trunk.
jeff
On Mon, Jun 26, 2023 at 12:41 PM Andrew Pinski wrote:
>
> On Mon, Jun 26, 2023 at 11:49 AM Andrew Pinski wrote:
> >
> > On Mon, Jun 26, 2023 at 9:13 AM Andrew Pinski wrote:
> > >
> > > On Sun, Jun 25, 2023 at 10:59 PM Jan-Benedict Glaw
> > > wrote:
> > > >
> > > > Hi Andrew,
> > > >
> > > > On
On 6/26/23 08:26, Robin Dapp via Gcc-patches wrote:
Hi,
this patch changes TYPE_MODE into element_mode in a match.pd
simplification. As the simplification can be called with vector types
real_can_shorten_arithmetic would ICE in REAL_MODE_FORMAT which
expects a scalar mode. Therefore, use el
On 6/26/23 06:18, Juzhe-Zhong wrote:
Currently, we are able to generate step vector with base == 0:
{ 0, 0, 2, 2, 4, 4, ... }
ASM:
vid
vand
However, we do wrong for step vector with base != 0:
{ 1, 1, 3, 3, 5, 5, ... }
Before this patch, such case will run fail.
After this patch, we are
On 6/26/23 11:21, Jan Hubicka wrote:
Hi,
playing with testcases for path isolation and const function, I noticed
that we do not seem to even try to isolate out of range array accesses:
int a[3]={0,1,2};
test(int i)
{
if (i > 3)
return test2(a[i]);
return a[i];
}
Here
Hi Andrew,
On Mon, 2023-06-26 09:13:51 -0700, Andrew Pinski wrote:
> On Sun, Jun 25, 2023 at 10:59 PM Jan-Benedict Glaw wrote:
> > On Fri, 2023-05-05 08:17:19 -0700, Andrew Pinski via Gcc-patches
> > wrote:
> > > While looking into a different issue, I noticed that it
> > > would take until th
While looking for the access attribute,
I tried to find it via the concept index but it was
missing. This patch fixes that and adds one for
interrupt/interrupt_handler too.
Committed as obvious after building the HTML docs
and looking at the resulting concept index page.
gcc/ChangeLog:
*
Ping. This patch is a simple fix here. Ok for trunk ?
juzhe.zh...@rivai.ai
From: Juzhe-Zhong
Date: 2023-06-26 20:18
To: gcc-patches
CC: kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH V2] RISC-V: Support const vector expansion with step vector
with
On 6/26/23 12:59, Robin Dapp wrote:
Hi,
this patch implements widening and narrowing float-to-int and
int-to-float autovec conversions and adds tests.
Regards
Robin
gcc/ChangeLog:
* config/riscv/autovec.md (2): New
expander.
(2): Dito.
(2): Dito.
(
LGTM.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-27 02:59
To: gcc-patches; palmer; Kito Cheng; juzhe.zh...@rivai.ai; jeffreyalaw
CC: rdapp.gcc
Subject: [PATCH] RISC-V: Add autovect widening/narrowing Integer/FP conversions.
Hi,
this patch implements widening and narrowing float-to-i
On 6/26/23 12:58, Robin Dapp wrote:
Hi,
this patch adds FP widening and narrowing autovec expanders as well as
tests. Conceptually similar to integer extension/truncation, we emulate
_Float16 -> double by two vfwcvts and double -> _Float16 by two vfncvts.
Optimizations to create widening op
A comment here:
- [(set_attr "type" "vshift")
+ [(set_attr "type" "vnshift")
You should drop this change, otherwise LGTM.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-27 02:58
To: gcc-patches; palmer; Kito Cheng; juzhe.zh...@rivai.ai; jeffreyalaw
CC: rdapp.gcc
Subject: [PATCH] RISC-
LGTM too.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-06-27 05:50
To: Robin Dapp; gcc-patches; palmer; Kito Cheng; juzhe.zh...@rivai.ai
Subject: Re: [PATCH] RISC-V: Add autovec FP int->float conversion.
On 6/26/23 12:58, Robin Dapp wrote:
> Hi,
>
> this patch adds the autovec expander
On 6/26/23 12:58, Robin Dapp wrote:
Hi,
this patch adds the autovec expander for vfcvt.f.x.v and tests for it.
In addition, it modifies the zfhmin-1 test so it doesn't scan for
"no vectorization" but rather check that we do not emit any (RTL)
vector operations (other than float/float conversi
Oluwatamilore Adebayo writes:
> From: oluade01
>
> This patch adds new RTL for ABDL (sabdl, sabdl2, uabdl, uabdl2).
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-simd.md
> (vec_widen_abdl_lo_, vec_widen_abdl_hi_):
> Expansions for abd vec widen optabs.
> (aarch64_abdl_in
Thanks for doing this. Generally looks good, but some comments below.
Oluwatamilore Adebayo writes:
> From: oluade01
>
> This updates vect_recog_abd_pattern to recognize the widening
> variant of absolute difference (ABDL, ABDL2).
>
> gcc/ChangeLog:
>
> * internal-fn.cc (widening_fn_p, de
On Mon, Jun 26, 2023 at 11:49 AM Andrew Pinski wrote:
>
> On Mon, Jun 26, 2023 at 9:13 AM Andrew Pinski wrote:
> >
> > On Sun, Jun 25, 2023 at 10:59 PM Jan-Benedict Glaw
> > wrote:
> > >
> > > Hi Andrew,
> > >
> > > On Fri, 2023-05-05 08:17:19 -0700, Andrew Pinski via Gcc-patches
> > > wrote:
On Sun, 25 Jun 2023, Nathaniel Shead wrote:
> On Fri, Jun 23, 2023 at 12:43:21PM -0400, Patrick Palka wrote:
> > On Wed, 29 Mar 2023, Nathaniel Shead via Gcc-patches wrote:
> >
> > > This adds rudimentary lifetime tracking in C++ constexpr contexts,
> > > allowing the compiler to report errors wi
Hi, Alexandre,
> On Jun 23, 2023, at 10:38 PM, Alexandre Oliva wrote:
>
>> For normal Boolean variables, 0x00 is false, this is a reasonable init
>> value with zero-initialization.
>
> *nod*. I was surprised by zero initialization of (non-hardened)
> booleans even when pattern is requested, bu
Hi,
this patch implements widening and narrowing float-to-int and
int-to-float autovec conversions and adds tests.
Regards
Robin
gcc/ChangeLog:
* config/riscv/autovec.md (2): New
expander.
(2): Dito.
(2): Dito.
(2): Dito.
* config/riscv/vector-it
Hi,
this patch adds FP widening and narrowing autovec expanders as well as
tests. Conceptually similar to integer extension/truncation, we emulate
_Float16 -> double by two vfwcvts and double -> _Float16 by two vfncvts.
Optimizations to create widening operations will be added separately.
Regar
Hi,
this patch adds the autovec expander for vfcvt.f.x.v and tests for it.
In addition, it modifies the zfhmin-1 test so it doesn't scan for
"no vectorization" but rather check that we do not emit any (RTL)
vector operations (other than float/float conversions) with a
VNx..HFmode.
Regards
Robin
On Wed, May 17, 2023 at 12:32 PM Jonathan Wakely wrote:
> -template
> - _OutputIterator
> -__brick_generate_n(_OutputIterator __first, _Size __count, _Generator
> __g, /* is_vector = */ std::true_type) noexcept
> +template
>
> Missing uglification on Size.
>
> +_RandomAccessIterator
> +__brick
On Mon, Jun 26, 2023 at 9:13 AM Andrew Pinski wrote:
>
> On Sun, Jun 25, 2023 at 10:59 PM Jan-Benedict Glaw wrote:
> >
> > Hi Andrew,
> >
> > On Fri, 2023-05-05 08:17:19 -0700, Andrew Pinski via Gcc-patches
> > wrote:
> > > While looking into a different issue, I noticed that it
> > > would tak
Richard Biener via Gcc-patches writes:
> On Sun, Jun 25, 2023 at 7:39 AM Roger Sayle
> wrote:
>>
>>
>> On Tue, 13 June 2023 12:02, Richard Biener wrote:
>> > On Mon, Jun 12, 2023 at 4:04 PM Roger Sayle
>> > wrote:
>> > > The following simple test case, from PR 104610, shows that memcmp ()
>> >
I merged trunk revision 3a39a31b8ae9c6465434aefa657f7fcc86f905c0 to
the gccgo branch.
Ian
Hi,
playing with testcases for path isolation and const function, I noticed
that we do not seem to even try to isolate out of range array accesses:
int a[3]={0,1,2};
test(int i)
{
if (i > 3)
return test2(a[i]);
return a[i];
}
Here call to test2 is dead, since a[i] will acces
The gc Go compiler has a -importcfg option that takes a file that
provides a mapping from import paths to the files that satisfy those
imports. This is used by the go build tool to let the compiler read
imported packages directly out of the build cache. Without this
option the go build tool has t
Hi all,
In the scalar pattern for SQRSHRUN it's a bit clearer to use DWI instead of
V2XWIDE
to make it more clear that no vector modes are involved.
No behavioural change intended.
Bootstrapped and tested on aarch64-none-linux-gnu.
Pushing to trunk.
Thanks,
Kyrill
gcc/ChangeLog:
* conf
Hi all,
aarch64_simd_rsra_rnd_imm_vec is now used for more than just RSRA
and accepts more than just vectors so rename it to make it more
truthful.
The aarch64_simd_rshrn_imm_vec is now unused and can be deleted.
No behavioural change intended.
Bootstrapped and tested on aarch64-none-linux-gnu.
P
On 6/26/23 08:50, Kito Cheng wrote:
LLVM will try to find scratch register even after RA to resolve the long
jump issue. so maybe we could consider similar approach? And I guess the
most complicate part would be the scratch register is not found, and
require spill/reload after RA.
Right. An
A change we have committed back in 2015 relies on the backend
requested ABI alignment to be applied to ALL symbols by the
middle-end. However, this does not appear to be the case for external
symbols. With this commit we assume all symbols without explicit
alignment to be aligned according to the A
Tested x86_64-linux. Pushed to trunk.
-- >8 --
The formatter for pointers was casting to uint64_t which sign extends a
32-bit pointer and produces a value that won't fit in the provided
buffer. Cast to uintptr_t instead.
There was also a bug in the __parse_integer helper when converting a
wide s
Tested x86_64-linux. Pushed to trunk.
-- >8 --
This was recently approved for C++26, but there's no harm in
implementing it unconditionally for C++20 and C++23. As it says in the
paper, it doesn't change the meaning of any valid code. It only enables
things that were previously ill-formed for que
Tested x86_64-linux. Pushed to trunk.
-- >8 --
These functions should be qualified to disable unwanted ADL.
The overload of __check_singular_aux for safe iterators was previously
being found by ADL, because it wasn't declared before __check_singular.
Add a declaration so that it can be found by
Hi,
On Mon, May 22 2023, Aldy Hernandez via Gcc-patches wrote:
> Minor cleanups to get rid of value_range in IPA. There's only one left,
> but it's in the switch code which is integer specific.
>
> OK?
With the same request that...
>
> gcc/ChangeLog:
>
> * ipa-cp.cc (decide_whether_versio
Hi,
On Mon, May 22 2023, Aldy Hernandez via Gcc-patches wrote:
> Implement hashing for ipa_vr. When all is said and done, all these
> patches incurr a 7.64% slowdown for ipa-cp, with is entirely covered by
> the similar 7% increase in this area last week. So we get type agnostic
> ranges with "i
Hi,
On Mon, May 22 2023, Aldy Hernandez via Gcc-patches wrote:
> This patch converts the ipa_jump_func code to use the type agnostic
> ipa_vr suitable for GC instead of value_range which is integer specific.
>
> I've disabled the range cacheing to simplify the patch for review, but
> it is handled
Hi,
compiling the testcase from PR109849 (which uses std:vector based stack to
drive a loop) with profile feedbakc leads to profile mismatches introduced by
tree-ssa-dce. This is the new code to produce unified forwarder blocks for
PHIs.
I am not including the testcase itself since
checking it fo
On Sun, Jun 25, 2023 at 10:59 PM Jan-Benedict Glaw wrote:
>
> Hi Andrew,
>
> On Fri, 2023-05-05 08:17:19 -0700, Andrew Pinski via Gcc-patches
> wrote:
> > While looking into a different issue, I noticed that it
> > would take until the second forwprop pass to do some
> > forward proping and it w
From: oluade01
This patch adds new RTL for ABDL (sabdl, sabdl2, uabdl, uabdl2).
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md
(vec_widen_abdl_lo_, vec_widen_abdl_hi_):
Expansions for abd vec widen optabs.
(aarch64_abdl_insn): VQW based abdl RTL.
* confi
From: oluade01
This updates vect_recog_abd_pattern to recognize the widening
variant of absolute difference (ABDL, ABDL2).
gcc/ChangeLog:
* internal-fn.cc (widening_fn_p, decomposes_to_hilo_fn_p):
Add IFN_VEC_WIDEN_ABD to the switch statement.
* internal-fn.def (VEC_WIDE
On Mon, 26 Jun 2023 at 17:30, Prathamesh Kulkarni <
prathamesh.kulka...@linaro.org> wrote:
> On Mon, 26 Jun 2023 at 20:33, Christophe Lyon via Gcc-patches
> wrote:
> >
> > After the recent MVE intrinsics re-implementation, LTO stopped working
> > because the intrinsics would no longer be defined.
On Mon, 26 Jun 2023 at 20:33, Christophe Lyon via Gcc-patches
wrote:
>
> After the recent MVE intrinsics re-implementation, LTO stopped working
> because the intrinsics would no longer be defined.
>
> The main part of the patch is simple and similar to what we do for
> AArch64:
> - call handle_arm
After the recent MVE intrinsics re-implementation, LTO stopped working
because the intrinsics would no longer be defined.
The main part of the patch is simple and similar to what we do for
AArch64:
- call handle_arm_mve_h() from arm_init_mve_builtins to declare the
intrinsics when the compiler i
LLVM will try to find scratch register even after RA to resolve the long
jump issue. so maybe we could consider similar approach? And I guess the
most complicate part would be the scratch register is not found, and
require spill/reload after RA.
Jeff Law via Gcc-patches 於 2023年6月26日 週一，22:31寫道：
>
On 6/25/23 12:45, Stefan O'Rear wrote:
To clarify: are you proposing to make ra (or t1 in the hypothetical) a fixed
register for all functions, or only those heuristically identified as
potentially
larger than 1MiB? And would this extend to forcing the creation of stack frames
for all func
Philipp Tomsich writes:
> Richard,
>
> OK for backport to GCC-13?
Yeah, OK for GCC 13 too.
Thanks,
Richard
> Thanks,
> Philipp.
>
> On Thu, 22 Jun 2023 at 16:18, Richard Sandiford via Gcc-patches
> wrote:
>>
>> Di Zhao OS via Gcc-patches writes:
>> > This patch enables reassociation of floati
Hi,
this patch changes TYPE_MODE into element_mode in a match.pd
simplification. As the simplification can be called with vector types
real_can_shorten_arithmetic would ICE in REAL_MODE_FORMAT which
expects a scalar mode. Therefore, use element_mode instead of
TYPE_MODE.
Additionally, check if
gcc/ChangeLog:
* doc/optinfo.texi: Fix "steam" -> "stream".
diff --git a/gcc/doc/optinfo.texi b/gcc/doc/optinfo.texi
index
b91bba7bd10470b17ca5190688beee06ad3b87ab..5e8c97ef118786e68b7e46f3c802154cb9b57b83
100644
--- a/gcc/doc/optinfo.texi
+++ b/gcc/doc/optinfo.texi
@@ -100,7 +100,7 @@ that o
Committed as passed both the bootstrap and regression test, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Monday, June 26, 2023 4:15 PM
To: Ju-Zhe Zhong
Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com
Subject: Re: [PAT
Committed as passed both the bootstrap and regression test, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Monday, June 26, 2023 4:17 PM
To: Ju-Zhe Zhong
Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com
Subject: Re: [PAT
When calculating ranges, GORI evaluates the chain of definitions until
it finds the desired name.
_4 = (short unsigned int) c.2_1;
_5 = _4 + 65535;
a_lsm.19_30 = a;
_49 = _4 + 65534;
_12 = _5 & _49;
_46 = _12 + 65535;
_48 = _12 & _46; <<--
if (_48 != 0)
When evaluatin
> On Jun 23, 2023, at 7:27 PM, Alexandre Oliva wrote:
>
> On Jun 23, 2023, Qing Zhao via Gcc-patches wrote:
>
>> It’s better to add this definition earlier in the list of the “three
>> basic values”, to make it “four basic values”, like the following:
>
> Oh, my, sorry for being so dense, I
Many intrinsics currently depend on both an architecture version and a
feature, despite the corresponding instructions being available within
GCC at lower architecture versions.
LLVM has already removed these explicit architecture version
dependences; this patch does the same for GCC, as well as r
Hi，Richi.>> I guess it would be nice to re-formulate the loop in terms of
>> the encoded VECTOR_CST elts, but then we need to generate
>> the "extents" for set bits, not sure how to do that here.
>> Note in the end we get HOST_WIDE_INT extents from adding
>> the element size for each mask element w
On Sat, Jun 24, 2023 at 6:12 AM Ajit Agarwal wrote:
>
> Hello All:
>
> This patch improves code sinking pass to sink statements before call to reduce
> register pressure.
> Review comments are incorporated.
>
> For example :
>
> void bar();
> int j;
> void foo(int a, int b, int c, int d, int e, in
Richard Biener writes:
> The following fixes a bug that manifests itself during fold-left
> reduction transform in picking not the last scalar def to replace
> and thus double-counting some elements. But the underlying issue
> is that we merge a load permutation into the in-order reduction
> whic
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 26/06/23 6:12 pm, Ajit Agarwal via Gcc-patches wrote:
> All:
>
> Ok for trunk. Please review.
>
> Thanks & Regards
> Ajit
>
> On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
>> Hello All:
>>
>> This new version of patch 4 us
On Mon, 26 Jun 2023, juzhe.zh...@rivai.ai wrote:
> Hi, Richi.
>
> >> I think you can use ordered_min here? Alternatively doing ...
>
> I check the function of ordered_min:
> ordered_min (const poly_int_pod &a, const poly_int_pod &b)
> {
> if (known_le (a, b))
> return a;
> else
> {
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This new version of patch 4 use improve ree pass for rs6000 target using
> defined ABI interfaces.
> Bootstrapped and regtested on power64-linux-gnu.
>
> Review c
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 07/06/23 3:55 pm, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This patch provide functionality to improve ree pass for rs6000 target.
> Eliminated sign_extend/zero_extend/AND with varying constants.
>
> Bootstrapped and regtes
All:
Ok for trunk. Please review.
Thanks & Regards
Ajit
On 01/06/23 10:53 am, Ajit Agarwal via Gcc-patches wrote:
> Hello All:
>
> This new version of patch 4 use improve ree pass for rs6000 target using
> defined ABI interfaces.
> Bootstrapped and regtested on power64-linux-gnu.
>
> Review
Sure. Sent it:
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622836.html
juzhe.zh...@rivai.ai
From: Kito Cheng
Date: 2023-06-26 17:10
To: Robin Dapp
CC: Juzhe-Zhong; gcc-patches; kito.cheng; palmer; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Enhance RVV VLA SLP auto-vectorization
Hi, Richi.
>> I think you can use ordered_min here? Alternatively doing ...
I check the function of ordered_min:
ordered_min (const poly_int_pod &a, const poly_int_pod &b)
{
if (known_le (a, b))
return a;
else
{
if (N > 1)
gcc_checking_assert (known_le (b, a));
return b
On Mon, Jun 26, 2023 at 1:58 PM Richard Sandiford via Gcc-patches
wrote:
>
> g:6f19cf7526168f8 extended N-vector to N-vector conversions
> to handle cases where an intermediate integer extension or
> truncation is needed. This patch adjusts the cost to account
> for these intermediate conversions
Currently, we are able to generate step vector with base == 0:
{ 0, 0, 2, 2, 4, 4, ... }
ASM:
vid
vand
However, we do wrong for step vector with base != 0:
{ 1, 1, 3, 3, 5, 5, ... }
Before this patch, such case will run fail.
After this patch, we are able to pass the testcase and generate the
The following fixes a bug that manifests itself during fold-left
reduction transform in picking not the last scalar def to replace
and thus double-counting some elements. But the underlying issue
is that we merge a load permutation into the in-order reduction
which is of course wrong.
Now, reduct
No, I don't think we can use first case (vid + vand -npatterns) for base != 0,
since the first element value of vid is alway 0.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-26 15:51
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw
S
On Mon, 26 Jun 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> Hi, Richi. It seems that we use nunits which is len + bias to iterate then we
> can
> simplify the codes.
>
> Also, I fixed behavior of len_store,
>
> Before this patch:
>(len - bias) * BITS_PER_UNIT
> After this pa
From: Ju-Zhe Zhong
Hi, Richi. It seems that we use nunits which is len + bias to iterate then we
can
simplify the codes.
Also, I fixed behavior of len_store,
Before this patch:
(len - bias) * BITS_PER_UNIT
After this patch:
(len + bias) * BITS_PER_UNIT
gcc/ChangeLog:
* tree-
g:6f19cf7526168f8 extended N-vector to N-vector conversions
to handle cases where an intermediate integer extension or
truncation is needed. This patch adjusts the cost to account
for these intermediate conversions.
Tested on aarch64-linux-gnu & x86_64-linux-gnu. OK to install?
Richard
gcc/
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