Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

On Sep 30, 2024, at 14:18, Kito Cheng wrote: > > Hi Yang-Yu > > Yeah, I was planning to send another version to update the interface > to the latest, but I'm just too busy (too lazy?) to update, anyway > will send new revision soon, > > However...one of our folk are also working on > target_clo

Re: [PATCH] RISC-V: Add an implicit dependency for Zawrs

LGTM, and let me know if you need my help to commit that :) On Mon, Sep 30, 2024 at 9:37 AM Xiao Zeng wrote: > > There is a description in > : > > "The instructions in the Zawrs extension are only useful in conjunction > with th

Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

Hi Yang-Yu Yeah, I was planning to send another version to update the interface to the latest, but I'm just too busy (too lazy?) to update, anyway will send new revision soon, However...one of our folk are also working on target_clone/target_versions, not sure what your current status is? Maybe w

Re: [RFC PATCH] More detailed diagnostics for section type conflicts

On Sun, Sep 29, 2024 at 5:13 PM Florian Weimer wrote: > > Sometimes this is a user error, sometimes it is more of an ICE. > In either case, more information about the conflict is helpful. > > I used to this to get a better idea about what is going on with > PR116887. The original diagnostics look

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

Hi Yang-Yu: > > Specially, we can reproduce the result on BananaPi-F3 Hardware: > > Use this GCC branch with my patch: > https://github.com/cyyself/gcc/tree/rv_can_inline > > And compile the coremark on this branch: > https://github.com/cyyself/coremark/tree/rva22_v_hotspot > > With command `make

Re: [RFC/RFA] [PATCH v4 10/12] Verify detected CRC loop with symbolic execution and LFSR matching

On Sun, Sep 29, 2024 at 8:01 PM Jeff Law wrote: > > > > On 9/13/24 5:06 AM, Mariam Arutunian wrote: > > Symbolically execute potential CRC loops and check whether the loop > > actually calculates CRC (uses LFSR matching). > > Calculated CRC and created LFSR are compared on each iteration of the >

[PATCH v2] RISC-V: Optimize branches with shifted immediate operands

Based on the feedback I received, the patch now uses a custom code iterator instead of relying on match_operator. Since both operands (2 and 3) have trailing zeros, an additional check was introduced to verify if they remain SMALL_OPERANDs after shifting by the smaller number of trailing zeros. T

Re: [PATCH] SH: Document extended asm operand modifers

On Sun, 2024-09-29 at 17:27 -0600, Jeff Law wrote: > > On 9/29/24 5:12 PM, Oleg Endo wrote: > > > > On Sun, 2024-09-29 at 10:40 -0600, Jeff Law wrote: > > > > > > On 9/20/24 3:48 PM, Pietro Monteiro wrote: > > > > From: Pietro Monteiro > > > > > > > > SH: Document extended asm operand modif

Re: [PATCH] aarch64: Expand CTZ to RBIT + CLZ for SVE [PR109498]

Reworked the patch to substitute immediate register values in the test case with regular expressions. Apologies for the oversight. Thanks, Soumya > On 24 Sep 2024, at 8:53 AM, Soumya AR wrote: > > Currently, we vectorize CTZ for SVE by using the following operation: > .CTZ (X) = (PREC - 1) - .

[testcase] Fix absfloat16.c testcase

Hi, This patch Fixes absfloat16.c testcase to have the dg-add-options float16 at the correct order. Due to this mixup, this test is failing for some arm variants. Is this OK for trunk? Thanks, Kugan 0001-Fix-absfloat16.c-testcase.patch Description: 0001-Fix-absfloat16.c-testcase.patch

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

> On Sep 30, 2024, at 10:34, Yangyu Chen wrote: >> >> >> On Sep 30, 2024, at 02:49, Jeff Law wrote: >> On 9/9/24 6:11 AM, Yangyu Chen wrote: >>> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V >>> ISA. As a result, certain functions cannot be optimized with inlining >>> when

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

> On Sep 30, 2024, at 02:49, Jeff Law wrote: > > > > On 9/9/24 6:11 AM, Yangyu Chen wrote: >> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V >> ISA. As a result, certain functions cannot be optimized with inlining >> when specific options, such as __attribute__((target("arc

[PATCH] RISC-V: Add an implicit dependency for Zawrs

There is a description in : "The instructions in the Zawrs extension are only useful in conjunction with the LR instruction, which is provided by the Zalrsc component of the A extension." It can be concluded that: zawrs -> zalrs

[PATCH] libstdc++-v3: Fix signed-overflow warning for newlib/ctype_base.h, PR116895

FWIW, I see "typedef char mask;" also for bionic and openbsd. Tested for cris-elf. Ok to commit? -- >8 -- There are 100+ regressions when running the g++ testsuite for newlib targets (probably excepting ARM-based ones) e.g cris-elf after commit r15-3859-g63a598deb0c9fc "libstdc++: #ifdef out #pr

Re: [RFC PATCH] More detailed diagnostics for section type conflicts

On Sun, 2024-09-29 at 17:12 +0200, Florian Weimer wrote: > Sometimes this is a user error, sometimes it is more of an ICE. > In either case, more information about the conflict is helpful. > > I used to this to get a better idea about what is going on with > PR116887.  The original diagnostics loo

Re: [PATCH] SH: Document extended asm operand modifers

On 9/29/24 5:12 PM, Oleg Endo wrote: On Sun, 2024-09-29 at 10:40 -0600, Jeff Law wrote: On 9/20/24 3:48 PM, Pietro Monteiro wrote: From: Pietro Monteiro SH: Document extended asm operand modifers gcc/ChangeLog: * doc/extend.texi (SH Operand Modifiers): New. Signed-off-by: Pietr

Re: [PATCH] SH: Document extended asm operand modifers

On Sun, 2024-09-29 at 10:40 -0600, Jeff Law wrote: > > On 9/20/24 3:48 PM, Pietro Monteiro wrote: > > From: Pietro Monteiro > > > > SH: Document extended asm operand modifers > > > > gcc/ChangeLog: > > * doc/extend.texi (SH Operand Modifiers): New. > > > > Signed-off-by: Pietro Monteiro

Re: [PATCH] [tree-optimization/110279] fix testcase pr110279-1.c

On 5/23/24 3:55 AM, Di Zhao OS wrote: -Original Message- From: Jeff Law Sent: Wednesday, May 22, 2024 11:14 PM To: Di Zhao OS ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [tree-optimization/110279] fix testcase pr110279-1.c On 5/22/24 5:46 AM, Di Zhao OS wrote: The test case is

Re: [RFC/RFA][PATCH v2 03/12] RISC-V: Add CRC expander to generate faster CRC.

On 8/28/24 2:14 AM, Mariam Arutunian wrote: Yes, I applied some of the changes I made in AArch64 here as well, where possible and worked. Also, in AArch64, I used force_reg in some cases, but here, I didn't change, as you had told me to use riscv_expand_* instead of force_reg. I don't reca

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

On 9/9/24 6:11 AM, Yangyu Chen wrote: Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V ISA. As a result, certain functions cannot be optimized with inlining when specific options, such as __attribute__((target("arch=+v"))) . This can lead to potential performance issues when bu

Re: [PATCH] cselib: Discard useless locs of preserved VALUEs [PR116627]

On 9/11/24 3:26 PM, Jakub Jelinek wrote: Hi! remove_useless_values iteratively discards useless locs (locs of cselib_val which refer to non-preserved VALUEs with no locations), which in turn can make further values useless until no further VALUEs are made useless and then discards the useless

Re: [RFC/RFA][PATCH v4 12/12] Add tests for CRC detection and generation.

On 9/13/24 5:06 AM, Mariam Arutunian wrote:   gcc/testsuite/gcc.dg/     * crc-from-fedora-packages-(1-32).c New tests.     * crc-linux-(1-5).c: Likewise.     * crc-not-crc-(1-26).c: Likewise.     * crc-side-instr-(1-17).c: Likewise.   gcc/testsuite/gcc.dg/torture/     * crc-(1-29).c:

Re: [RFC/RFA] [PATCH v4 11/12] Replace the original CRC loops with a faster CRC calculation.

On 9/13/24 5:06 AM, Mariam Arutunian wrote: After the loop exit an internal function call (CRC, CRC_REV) is added, and its result is assigned to the output CRC variable (the variable where the calculated CRC is stored after the loop execution). The removal of the loop is left to CFG cleanup

Re: [RFC/RFA] [PATCH v4 10/12] Verify detected CRC loop with symbolic execution and LFSR matching

On 9/13/24 5:06 AM, Mariam Arutunian wrote: Symbolically execute potential CRC loops and check whether the loop actually calculates CRC (uses LFSR matching). Calculated CRC and created LFSR are compared on each iteration of the potential CRC loop.   gcc/     * Makefile.in (OBJS): Add crc

[patch,avr] Use (symbol_ref { code }) in insn length computation.

This patch uses the new gensupport feature (review pending) that allows to provide a block of C++ code in a symbol_ref sub-expression instead of just a C++ expression: https://gcc.gnu.org/pipermail/gcc-patches/2024-September/664093.html Ok for trunk (provided the gensupport part is upstream) ?

[patch,gensupport] Support (symbol_ref { code }) in insn attributes.

When md_reader is reading insn attributes from md files, it accepts expressions like (symbol_ref { code }) and (symbol_ref "{ code }") as valid expressions. However, when generating insn-attrtab.cc, it would print the {} block as an expression, which is not valid C++ syntax. The conclusion

[COMMITTED] testsuite: XFAIL gfortran.dg/initialization_25.f90 properly (again)

dg-error needs an argument for "why" / a comment. gcc/testsuite/ChangeLog: PR fortran/116858 * gfortran.dg/initialization_25.f90: Fix dg-error arguments. --- gcc/testsuite/gfortran.dg/initialization_25.f90 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/te

Re: [RFC/RFA] [PATCH v4 09/12] Add symbolic execution support.

On 9/13/24 5:06 AM, Mariam Arutunian wrote: Gives an opportunity to execute the code on bit level, assigning symbolic values to the variables which don't have initial values. Supports only CRC specific operations. Example: uint8_t crc; uint8_t pol = 1; crc = crc ^ pol; during symbolic execu

Re: [RFC/RFA] [PATCH v4 08/12] Add a new pass for naive CRC loops detection.

On 9/13/24 5:06 AM, Mariam Arutunian wrote: This patch adds a new compiler pass aimed at identifying naive CRC implementations, characterized by the presence of a loop calculating a CRC (polynomial long division). Upon detection of a potential CRC, the pass prints an informational message.

Re: [RFC/RFA] [PATCH v4 07/12] aarch64: Add CRC built-ins test for the target AES.

On 9/13/24 5:06 AM, Mariam Arutunian wrote:   gcc/testsuite/gcc.target/aarch64/     * crc-builtin-pmul64.c: New test. OK jeff

Re: [RFC/RFA][PATCH v4 06/12] aarch64: Implement new expander for efficient CRC computation

On 9/13/24 5:06 AM, Mariam Arutunian wrote: This patch introduces two new expanders for the aarch64 backend, dedicated to generate optimized code for CRC computations. The new expanders are designed to leverage specific hardware capabilities to achieve faster CRC calculations, particularly us

Re: [RFC/RFA][PATCH v4 05/12] i386: Implement new expander for efficient CRC computation

On 9/13/24 5:05 AM, Mariam Arutunian wrote: This patch introduces two new expanders for the i386 backend, dedicated to generating optimized code for CRC computations. The new expanders are designed to leverage specific hardware capabilities to achieve faster CRC calculations, particularly us

Re: [RFC/RFA] [PATCH v4 04/12] RISC-V: Add CRC built-ins tests for the target ZBC.

On 9/13/24 5:05 AM, Mariam Arutunian wrote:   gcc/testsuite/gcc.target/riscv/     * crc-builtin-zbc32.c: New file.     * crc-builtin-zbc64.c: Likewise. OK jeff

Re: [RFC/RFA] [PATCH v4 03/12] RISC-V: Add CRC expander to generate faster CRC.

On 9/13/24 5:05 AM, Mariam Arutunian wrote:  If the target is ZBC or ZBKC, it uses clmul instruction for the CRC  calculation.         Otherwise, if the target is ZBKB, generates table-based  CRC, but for reversing inputs and the output uses bswap and brev8  instructions.         Add new

Re: [RFC PATCH] More detailed diagnostics for section type conflicts

* Andrew Pinski: >> + append (flags & SECTION_CODE, "CODE"); > > I notice you capture result and it seems like you could also capture > flags and change this to: > append (SECTION_CODE, "CODE"); Thanks, I've made the change locally. Florian

Re: [RFC/RFA][PATCH v4 02/12] Add built-ins and tests for bit-forward and bit-reversed CRCs

On 9/13/24 5:05 AM, Mariam Arutunian wrote: This patch introduces new built-in functions to GCC for computing bit- forward and bit-reversed CRCs. These builtins aim to provide efficient CRC calculation capabilities. When the target architecture supports CRC operations (as indicated by the pr

Re: [RFC/RFA] [PATCH v4 01/12] Implement internal functions for efficient CRC computation

On 9/13/24 5:05 AM, Mariam Arutunian wrote: Add two new internal functions (IFN_CRC, IFN_CRC_REV), to provide faster CRC generation. One performs bit-forward and the other bit-reversed CRC computation. If CRC optabs are supported, they are used for the CRC computation. Otherwise, table-based

Re: [PATCH] SH: Document extended asm operand modifers

On 9/20/24 3:48 PM, Pietro Monteiro wrote: From: Pietro Monteiro SH: Document extended asm operand modifers gcc/ChangeLog: * doc/extend.texi (SH Operand Modifiers): New. Signed-off-by: Pietro Monteiro --- Tested by running "make info pdf html" and looking at the pdf and html outpu

Re: [RFC PATCH] More detailed diagnostics for section type conflicts

On Sun, Sep 29, 2024 at 8:13 AM Florian Weimer wrote: > > Sometimes this is a user error, sometimes it is more of an ICE. > In either case, more information about the conflict is helpful. > > I used to this to get a better idea about what is going on with > PR116887. The original diagnostics look

Re: [PATCH] [PATCH] Avoid integer overflow in gcc.dg/cpp/charconst-3.c (PR testsuite/116806)

On 9/22/24 7:00 AM, Mikael Pettersson wrote: The intermediate expression (unsigned char) '\234' * scale overflows int on int16 targets, causing the test case to fail there. Fixed by performing the arithmetic in unsigned type, as suggested by Andrew Pinski. Regression tested on x86_64-pc-linu

Re: [patch,avr] doc: Adjust more web links

On 9/17/24 4:44 AM, Georg-Johann Lay wrote: This patch updates more web links from nongnu to Github. The http://www.nongnu.org/avr links still worked, but the "super project" seems to be deserted.  Instead, it now links: * https://avrdudes.github.io/avr-libc/avr-libc-user-manual/ install_too

Re: [PATCH v2] RISC-V: Improve code generation for select of consecutive constants

On 9/27/24 1:36 AM, Jovan Vukic wrote: Based on the valuable feedback I received, I decided to implement the patch in the RTL pipeline. Since a similar optimization already exists in simplify_binary_operation_1, I chose to generalize my original approach and place it directly below that code.

Re: [PATCH] gdbhooks: Handle references to vec* in VecPrinter

On 9/23/24 4:33 AM, Alex Coplan wrote: On 30/08/2024 18:11, Alex Coplan wrote: Hi, vec.h has this method: template inline T * vec_safe_push (vec *&v, const T &obj CXX_MEM_STAT_INFO) where v is a reference to a pointer to vec. This matches the regex for VecPrinter, so gdbhooks.py

Re: [PATCH] MATCH: Simplify `(trunc)copysign ((extend)x, CST)` to `copysign (x, -1.0/1.0)` [PR112472]

On 9/24/24 2:57 AM, Eikansh Gupta wrote: This patch simplify `(trunc)copysign ((extend)x, CST)` to `copysign (x, -1.0/1.0)` depending on the sign of CST. Previously, it was simplified to `copysign (x, CST)`. It can be optimized as the sign of the CST matters, not the value. The patch also s

Re: [PATCH v1 2/3] RISC-V: Implement scalar SAT_SUB for signed integer

On 9/24/24 8:55 PM, pan2...@intel.com wrote: From: Pan Li This patch would like to implement the sssub form 1. Aka: Form 1: #define DEF_SAT_S_SUB_FMT_1(T, UT, MIN, MAX) \ T __attribute__((noinline)) \ sat_s_sub_##T##_fmt_1 (T x, T y) \ {

Re: [PATCH] MATCH: Simplify `min(a, b) op max(a, b)` to `a op b` [PR109401]

On 9/25/24 2:30 AM, Eikansh Gupta wrote: This patch simplify `min(a,b) op max(a,b)` to `a op b`. This optimization will work for all the binary commutative operations. So, the `op` here can be one of {plus, mult, bit_and, bit_xor, bit_ior, eq, ne, min, max}. PR tree-optimization/10987

Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

On 9/29/24 3:16 AM, Yangyu Chen wrote: Good job. I'm currently working on RISC-V target_clone and target_versions support in GCC and found this patch is needed as my prerequisite. However, I found this tagged as "dropped" on Patchwork. What happened? I think Kito was going to revamp this s

[RFC PATCH] More detailed diagnostics for section type conflicts

Sometimes this is a user error, sometimes it is more of an ICE. In either case, more information about the conflict is helpful. I used to this to get a better idea about what is going on with PR116887. The original diagnostics look like this: dl-find_object.c: In function ‘_dlfo_process_initial’

Re: [PATCH] doc: Document struct-layout-1.exp for ABI checks

On Sun, Sep 08, 2024 at 08:48:57AM +0300, Dimitar Dimitrov wrote: > This test helped discover PR116621, so it is worth being documented. > > gcc/ChangeLog: > > * doc/sourcebuild.texi: Document struct-layout-1.exp. > > Signed-off-by: Dimitar Dimitrov LGTM. Jakub

Re: [PATCH] doc: Document struct-layout-1.exp for ABI checks

On Sun, Sep 08, 2024 at 08:48:57AM +0300, Dimitar Dimitrov wrote: > This test helped discover PR116621, so it is worth being documented. > > gcc/ChangeLog: > > * doc/sourcebuild.texi: Document struct-layout-1.exp. > > Signed-off-by: Dimitar Dimitrov > --- > gcc/doc/sourcebuild.texi | 18

Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

Good job. I'm currently working on RISC-V target_clone and target_versions support in GCC and found this patch is needed as my prerequisite. However, I found this tagged as "dropped" on Patchwork. What happened?