RE: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data

> -Original Message- > From: Tamar Christina > Sent: Thursday, July 31, 2025 7:41 AM > To: Richard Biener ; gcc-patches@gcc.gnu.org > Subject: RE: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data > > > -Original Message- > > From: Richard Biener > > Sent: Wednesday

RE: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data

> -Original Message- > From: Richard Biener > Sent: Wednesday, July 30, 2025 12:17 PM > To: gcc-patches@gcc.gnu.org > Cc: Tamar Christina > Subject: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data > > The following adds vect_simd_clone_data as a container for vect > type

[PATCH, V8] Fix PR 118541, do not generate unordered fp compares

I have rewritten this page, removing the 'ordered' terminology in the coomit messages and comments that was a problem. I have also rewritten the patch to hopefully make it easier to understand. I have built it on both big endian and little endian servers with no regressions. Proposed commit mes

[PATCH v1] RISC-V: Fix scalar code-gen of unsigned SAT_MUL

From: Pan Li The previous code-gen of scalar unsigned SAT_MUL, aka usmul. Leverage the mulhs by mistake, it should be mulhu for the hight bit result of mul. Thus, this patch would like to make it correct. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_expand_xmode_usmul): Take u

Re: [PATCH v4] c++: P2036R3 - Change scope of lambda trailing-return-type [PR102610]

On 7/25/25 4:55 PM, Marek Polacek wrote: On Thu, Jul 17, 2025 at 05:20:31PM -0400, Jason Merrill wrote: On 7/16/25 5:59 PM, Marek Polacek wrote: On Mon, Jul 14, 2025 at 12:52:41PM -0400, Jason Merrill wrote: On 7/11/25 5:49 PM, Marek Polacek wrote: On Thu, Jul 10, 2025 at 02:13:06PM -0400, Ja

Re: [PATCH] c: Use the default TLS mode if it is more optimized

On Wed, Jul 30, 2025 at 8:24 PM Andrew Pinski wrote: > > On Wed, Jul 30, 2025 at 5:33 PM H.J. Lu wrote: > > > > According to the TLS spec, linker can optimize the TLS access by > > overriding the TLS access model. Do the same in compiler by using > > the default TLS mode if it is more optimized

Re: [PATCH] c: Use the default TLS mode if it is more optimized

On Wed, Jul 30, 2025 at 5:33 PM H.J. Lu wrote: > > According to the TLS spec, linker can optimize the TLS access by > overriding the TLS access model. Do the same in compiler by using > the default TLS mode if it is more optimized than the TLS model > attribute. So reading the old bug reports sp

[committed] RISC-V: Adding H to the canonical order [PR121312]

We added H into canonical order before, but forgot to add it to arch-canonicalize as well... gcc/ChangeLog: PR target/121312 * config/riscv/arch-canonicalize: Add H extension to the canonical order. --- gcc/config/riscv/arch-canonicalize | 2 +- 1 file changed, 1 insertio

RE: [PATCH] x86: Transform to "pushq $-1; popq reg" for -Oz

> -Original Message- > From: H.J. Lu > Sent: Wednesday, July 30, 2025 9:17 PM > To: Hongtao Liu > Cc: gcc-patches@gcc.gnu.org; ubiz...@gmail.com; Liu, Hongtao > > Subject: Re: [PATCH] x86: Transform to "pushq $-1; popq reg" for -Oz > > On Tue, Jul 29, 2025 at 11:37 PM Hongtao Liu wro

[PATCH] c: Use the default TLS mode if it is more optimized

According to the TLS spec, linker can optimize the TLS access by overriding the TLS access model. Do the same in compiler by using the default TLS mode if it is more optimized than the TLS model attribute. gcc/ PR c/121318 * doc/extend.texi: Update the tls_model attribute. gcc/c

Re: [PATCH] [sanitizer_common] Remove reference to obsolete termio ioctls (#138822)

Jakub Jelinek writes: > On Fri, Jul 25, 2025 at 07:51:41PM +0100, Sam James wrote: >> Cherry picked from LLVM commit c99b1bcd505064f2e086e6b1034ce0b0c91ea5b9. >> >> The termio ioctls are no longer used after commit 59978b21ad9c >> ("[sanitizer_common] Remove interceptors for deprecated struct te

Re: [PATCH 2/7 v2] RISC-V: Add support for the XAndesperf ISA extension.

Please find: https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release These instructions are from "3.1.26. NDS.FFB" to "3.1.29. NDS.FLMISM" in AndeStar_V5_ISA_Spec_UM165-v1.5.08-20250317.pdf. Thanks. Jeff Law 於 2025年7月30日 週三 下午11:22寫道： > > > > On 7/29/25 7:41 PM, KuanLin Chen wro

Re: [PATCH] c++/modules: Merge PARM_DECL properties from function definitions [PR121238]

On Thu, 31 Jul 2025, Nathaniel Shead wrote: > Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? > And maybe 15? Good catch re the invisiref handling! This LGTM, Jason what do you think? > > -- >8 -- > > When we merge a function definition, if there already exists a forward > de

[PATCH v4] Factor out thread model detection with new `GCC_AC_THREAD_MODEL` macro

This macro deduplicates the $CC -v 2>&1 | sed -n 's/^Thread model: //p' check that was occurring in various runtime libs. Additionally, as a bit of an Easter egg, this also allows overriding what the compiler would return by setting the `gcc_cv_target_thread_file` cache variable first. I adm

[PATCH v4] Move NO_PIE_CFLAGS logic from gcc to libgcc

My goal is to be able to build libgcc cleanly in isolation --- today one needs to figure `make ...` misc things in the gcc subdir. Following Andrew Pinski's suggestions in https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689683.html, this commit moves the NO_PIE_CFLAGS logic. gcc/ChangeLog:

[PATCH] libcpp: Improve locations for macros defined prior to PCH include [PR105608]

Hello- https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105608 The PR was originally about an ICE in the linemap code that was patched up for GCC 14. I left it open as a reminder to finish improving the locations assigned to macros that are defined prior to including a PCH. This patch provides that i

[PATCH] c++/modules: Merge PARM_DECL properties from function definitions [PR121238]

Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? And maybe 15? -- >8 -- When we merge a function definition, if there already exists a forward declaration in the importing TU we use the PARM_DECLs belonging to that decl. This usually works fine, except as noted in the linked PR t

[PATCH v5] c++: consteval blocks

On Wed, Jul 30, 2025 at 03:30:06PM -0400, Jason Merrill wrote: > On 7/25/25 3:59 PM, Marek Polacek wrote: > > On Tue, Jul 22, 2025 at 04:52:53PM -0400, Jason Merrill wrote: > > > On 7/21/25 6:28 PM, Marek Polacek wrote: > > > > On Mon, Jul 21, 2025 at 11:26:08AM -0400, Jason Merrill wrote: > > > >

Re: [PATCH] fortran: implement conditional expression for fortran 2023

Hi Yuao, That's exactly how I had a mind to do it. You beat me to it :-( Just get on, polish the patch and add more tests. Thanks Paul On Wed, 30 Jul 2025 at 15:53, Yuao Ma wrote: > Hi all, > > This patch introduces support for conditional expressions (also known as > ternary operators in s

Re: [PATCH] c: Suppress -Wdeprecated-non-prototype warnings for builtins

On Thu, 17 Jul 2025, Simon Marchi wrote: > On 6/26/25 12:14 PM, Simon Marchi wrote: > > I keep hitting the bug fixed by this patch with gcc 15.1: > > > > make[3]: Entering directory > > '/home/simark/build/binutils-gdb-all-targets/sim' > > CC bfin/gui.o > > In file included from /usr/inc

Re: [PATCH v3 2/2] libgcc: Dont use TARGET_SYSTEM_ROOT from gcc

On Wed, 16 Jul 2025, John Ericson wrote: > From: John Ericson > > Following Andrew Pinski's suggestions in > https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689683.html, just > use the output of: > >$(CC) -print-sysroot > > It is just used in one spot, in an AIX code-path. I just made

Re: [PATCH v3 1/2] Move NO_PIE_CFLAGS logic from gcc to libgcc

On Wed, 16 Jul 2025, John Ericson wrote: > gcc/ChangeLog: > > * Makefile.in:: Remove NO_PIE_CFLAGS logic, since it is now in > libgcc. > * configure.ac: Remove the enable_default_pie substitution, since > libgcc now has its own logic. > > libgcc/ChangeLog: > > * Ma

Re: [PATCH] c++: mangling cNTTP object w/ implicit initial zeros [PR121231]

On Wed, 30 Jul 2025, Patrick Palka wrote: > On Wed, 30 Jul 2025, Patrick Palka wrote: > > > On Wed, 30 Jul 2025, Patrick Palka wrote: > > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look > > > OK for trunk? > > > > > > -- >8 -- > > > > > > Here the result of A::make(0, 0

[PATCH v3] ipa, cgraph: Enable constant propagation to OpenMP kernels

Hi, This is the 3rd version of this patch. Changes made since v2: - implemented Martin's suggestions, mostly regarding naming - unintentionally removed lines added back - unknown arguments are no longer represented with an identity to the callback-carrying edge, zeroed-out jump functions are

Re: [PATCH v3] Factor out thread model detection with new `GCC_AC_THREAD_MODEL` macro

On Wed, 16 Jul 2025, John Ericson wrote: > config/ChangeLog: > > * gthr.m4: Create new GCC_AC_THREAD_MODEL macro > > libatomic/ChangeLog: > > * configure.ac: Use GCC_AC_THREAD_MODEL instead of hand-rolled > > libgcc/ChangeLog: > > * configure.ac: Use GCC_AC_THREAD_MODEL inst

Re: [PATCH] c++: mangling cNTTP object w/ implicit initial zeros [PR121231]

On Wed, 30 Jul 2025, Patrick Palka wrote: > On Wed, 30 Jul 2025, Patrick Palka wrote: > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look > > OK for trunk? > > > > -- >8 -- > > > > Here the result of A::make(0, 0, 1), (0, 1, 0) and (1, 0, 0) are each > > represented as a sin

Re: [PING*4][PATCH 1/1] config: Handle dash in library name for AC_LIB_LINKAGEFLAGS_BODY

On Tue, 15 Jul 2025, Ijaz, Abdul B wrote: > config/ChangeLog: > > * lib-link.m4: Handle dash in the library name for > AC_LIB_LINKFLAGS_BODY. OK. -- Joseph S. Myers josmy...@redhat.com

Re: [PATCH v3 1/3] aarch64: Stop using sys/ifunc.h header in libatomic and libgcc

On Wed, Jul 30, 2025 at 4:18 AM Yury Khrustalev wrote: > > This optional header is used to bring in the definition of the > struct __ifunc_arg_t type. Since it has been added to glibc only > recently, the previous implementation had to check whether this > header is present and, if not, it provide

Re: [PATCH] libgcc: Cleanup HWCAP defines in cpuinfo.c

On Wed, Apr 30, 2025 at 6:05 AM Richard Sandiford wrote: > > Wilco Dijkstra writes: > > Cleanup HWCAP defines - rather than including hwcap.h and then repeating it > > using > > #ifndef, just define the HWCAPs we need exactly as in hwcap.h. > > > > libgcc: > > * config/aarch64/cpuinfo.c:

Re: [PATCH] c++: mangling cNTTP object w/ implicit initial zeros [PR121231]

On Wed, 30 Jul 2025, Patrick Palka wrote: > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look > OK for trunk? > > -- >8 -- > > Here the result of A::make(0, 0, 1), (0, 1, 0) and (1, 0, 0) are each > represented as a single-element CONSTRUCTOR with CONSTRUCTOR_NO_CLEARING > cleare

[PATCH] c++: mangling cNTTP object w/ implicit initial zeros [PR121231]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- Here the result of A::make(0, 0, 1), (0, 1, 0) and (1, 0, 0) are each represented as a single-element CONSTRUCTOR with CONSTRUCTOR_NO_CLEARING cleared, and we end up mangling them all as A{1}, i.e. eliding bo

Re: [PATCH v2] rs6000: Avoid undefined behavior caused by overflow and invalid shifts

Hi! On Wed, Jul 30, 2025 at 01:12:27PM +0530, Kishan Parmar wrote: > PR target/118890 > * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): Avoid left > shift of Line too long, changelog lines are only 80 character positions max. > negative value and guard shift count.

Re: [PATCH v4] c++: consteval blocks

On 7/25/25 3:59 PM, Marek Polacek wrote: On Tue, Jul 22, 2025 at 04:52:53PM -0400, Jason Merrill wrote: On 7/21/25 6:28 PM, Marek Polacek wrote: On Mon, Jul 21, 2025 at 11:26:08AM -0400, Jason Merrill wrote: On 7/18/25 5:11 PM, Marek Polacek wrote: On Thu, Jul 17, 2025 at 06:44:08PM -0400, Ja

Re: [WIP] Fix function call handling according to Microsoft Arm64 variadic function call ABI

Forgot attachment, sorry. --- >From dac55e9dbc765ccfcc5a1f49baa4662dae3c3923 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radek=20Barto=C5=88?= Date: Mon, 4 Nov 2024 18:13:30 +0100 Subject: [PATCH] Fix function call handling according to Microsoft Arm64 variadic function call ABI --- gcc/config.gc

[WIP] Fix function call handling according to Microsoft Arm64 variadic function call ABI

Hello. Sending a WIP implementation of Microsoft Arm64 variadic function call ABI. On the https://github.com/Windows-on-ARM-Experiments/mingw-woarm64-build/compare/main...valist-tests test suite, it already performs better than LLVM implementation (compared to MSVC ABI) but there are still som

Re: [PATCH] libgfortran: add fallback for trigonometric pi-based functions

On Sun, 6 Jul 2025, Yuao Ma wrote: > +#ifndef HAVE_COSPI > +#define HAVE_COSPI 1 > +double cospi (double); > + > +double > +cospi (double x) > +{ > + return cos (x * pihi_d + x * pilo_d); For reasonable results for large x you should first reduce mod 2 to the range [-1, 1] (or reduce mod 1 and

[PATCH v3] i386: Add missing PTA_POPCNT and PTA_LZCNT with PTA_ABM

This patch adds the missing PTA_POPCNT and PTA_LZCNT with the PTA_ABM bitmask definition for the bdver1, btver1, and lujiazui architectures in the i386 architecture configuration file. Although these two features were not present in the original definition, their absence does not affect the functi

Re: [PATCH] Don't pass vector params through to offload targets

Hi Andrew! On 2025-07-25T14:44:06+, Andrew Stubbs wrote: > The optimization options are deliberately passed through to the LTO compiler, > but when the same mechanism is reused for offloading it ends up forcing the > host compiler settings onto the device compiler. Yeah, that's a problem: fo

[PATCH 2/5] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data

The following adds vect_simd_clone_data as a container for vect type specific data for vectorizable_simd_clone_call and moves SLP_TREE_SIMD_CLONE_INFO there. * tree-vectorizer.h (vect_simd_clone_data): New. (_slp_tree::simd_clone_info): Remove. (SLP_TREE_SIMD_CLONE_INFO): L

Re: [PATCHv7] libstdc++: Add NTTP bind_front, -back, not_fn (P2714) [PR119744]

On Wed, Jul 30, 2025 at 12:48 AM Nathan Myers wrote: > Changes in v7: > * Clean up comments, inactive cases in tests. > * Restore symmetry of tests for bind_back and bind_front > * Add another test for type qualifier propagation, per review > * Add test verifying arguments are properly moved

[PATCH 5/5] Enable gather/scatter for epilogues of vector epilogues

The restriction no longer applies, so remove it. Bootstrapped and tested on x86_64-unknown-linux-gnu. * tree-vect-data-refs.cc (vect_check_gather_scatter): Remove restriction on epilogue of epilogue vectorization. --- gcc/tree-vect-data-refs.cc | 7 --- 1 file changed, 7 dele

[PATCH 4/5] Remove gather/scatter DR fixup from epilogue vectorization

The following removes the no longer necessary fixup to the gather/scatter DRs from epilogue vectorization. This should also enable epilogue of epilogue vectorization with gather/scatters. This is made possible by remmebering and re-using the analysis results of get_load_store_type for load/store v

[PATCH 3/5] Record get_load_store_info results from analysis

The following is a prototype-quality patch to make us record the get_load_store_info results from load/store analysis and re-use them during transform. Rather than mass-replacing references to variables I've kept the locals but made them read-only, only adjusting a few elsval setters and adding a

[PATCH 1/5] Use a class hierarchy for vect specific data

The following turns the union into a class hierarchy. One completed SLP_TREE_TYPE could move into the base class. * tree-vect-slp.cc (_slp_tree::_slp_tree): Adjust. (_slp_tree::~_slp_tree): Likewise. * tree-vectorizer.h (vect_data): New base class. (_slp_tree::u):

Re: [PATCHv7] libstdc++: Add NTTP bind_front, -back, not_fn (P2714) [PR119744]

On Wed, Jul 30, 2025 at 12:48 AM Nathan Myers wrote: > Changes in v7: > * Clean up comments, inactive cases in tests. > * Restore symmetry of tests for bind_back and bind_front > * Add another test for type qualifier propagation, per review > * Add test verifying arguments are properly moved

Re: [PATCH] [RFC] Delayed parsing for bounds safety attributes

> On Jul 29, 2025, at 7:48 PM, Bill Wendling wrote: > > On Mon, Jul 28, 2025 at 11:36 PM Martin Uecker > wrote: >> >> Am Montag, dem 28.07.2025 um 17:45 -0700 schrieb Bill Wendling: >>> On Mon, Jul 28, 2025 at 4:29 PM Martin Uecker wrote: Am Montag, dem 28.07

[pushed] c++: improve non-constant template arg diagnostic

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- A conversation today pointed out that the current diagnostic for this case doesn't mention the constant evaluation failure, it just says e.g. "'p' is not a valid template argument for 'int*' because it is not the address of a variable" Thi

Re: [RFC][PATCH 1/1] testsuite: add BPF target board for execution testing

Hi Piyush, On 7/17/25 05:13, Piyush Raj wrote: > This patch adds new DejaGnu target board for BPF that enables execution > testing > of BPF programs using the `bpf-vmtest-tool` script in the contrib directory. Sorry for the delay. I am hoping Thomas or Jose can chime in who know a bit more about

Re: [PATCH] ifcvt: Fix ifcvt for multiple phi nodes after factoring operator [PR121236]

On Sun, Jul 27, 2025 at 11:43 AM Andrew Pinski wrote: > > When I added the factor operations to ifcvt, I messed how handling of removing > the phi nodes. The fix is we need to remove the phi node that was factored out > as we factored out the operator because otherwise scev can go when it comes >

Re: [PATCH] simplify-rtx: Add `(subreg (not a))` simplification for word_mode [PR121308]

On Wed, Jul 30, 2025 at 1:24 AM Richard Sandiford wrote: > > Andrew Pinski writes: > > Right now in simplify_subreg, there is code to try to simplify for word_mode > > with the binary bitwise operators. The unary bitwise operator is not handle, > > this causes an odd mix match and the new self te

Re: [PATCH 2/7 v2] RISC-V: Add support for the XAndesperf ISA extension.

On 7/29/25 7:41 PM, KuanLin Chen wrote: + +;; +;; +;; +;;String Extension +;; +;; +;; + +(define_insn "riscv_nds_ffb" + [(set (match_operand:GPR 0 "register_operand" "=r") + (unspec:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ") +

[PATCH] fortran: implement conditional expression for fortran 2023

Hi all, This patch introduces support for conditional expressions (also known as ternary operators in some languages) to Fortran. I decided to implement this feature after discovering that this common functionality, widely used in C/C++, wasn't available until the Fortran 2023 standard. This

[PATCH v8] Provide new option -fdiagnostics-show-context=N for -Warray-bounds, -Wstringop-* warnings [PR109071, PR85788, PR88771, PR106762, PR108770, PR115274, PR117179]

Hi, This is the 8th version of the patches for fixing PR109071. Adding -fdiagnotics-show-context=N into GCC to provide context information to the end users on how the warnings come from, in order to help the user to locate the exact location in source code on the specific warnings due to compiler

Error on truncated auto-profiles

Hi, currently -fauto-profile will happily read truncated file without any warning and interpret it as a zero profile which will in turn result in slow code. This patch exports gcov_is_error and adds checks so truncated files are detected. Bootstrapped/regtesed x86_64-linux, comitted. gcc/ChangeL

Re: [PATCH v2 1/3] aarch64: Stop using sys/ifunc.h header in libatomic and libgcc

Hi Remi On Wed, Jul 30, 2025 at 12:49:26PM +, Remi Machet wrote: > > Hi, > > Thank you for your reply and looking into it. > > I don't see anything trivial thus this is probably best left for a subsequent > cleanup. > > Can we assume libatomic depends on libgcc? If that is ok then it migh

Re: [PATCH] aarch64: Add tuning model for Olympus core.

> On 28 Jul 2025, at 10:39, Jennifer Schmitz wrote: > > External email: Use caution opening links or attachments > > >> On 28 Jul 2025, at 10:23, Kyrylo Tkachov wrote: >> >> >> >>> On 27 Jul 2025, at 03:31, Andrew Pinski wrote: >>> >>> On Fri, Jul 25, 2025 at 5:14 AM Jennifer Schmitz

Re: [PATCH v2] c++: Don't assume trait funcs return error_mark_node when tf_error is passed [PR121291]

On Wed, 30 Jul 2025, Nathaniel Shead wrote: > On Tue, Jul 29, 2025 at 03:45:29PM -0400, Patrick Palka wrote: > > On Tue, 29 Jul 2025, Nathaniel Shead wrote: > > > > > Tested on x86_64-pc-linux-gnu, OK for trunk if full bootstrap+regtest > > > passes? > > > > > > -- >8 -- > > > > > > For the sak

Re: [PATCH] [x86] factor out worker from ix86_builtin_vectorization_cost

> The following factors out a worker that gets a mode argument > rather than a vectype argument. That makes a difference when > we hit the fallback in add_stmt_cost for scalar stmts where > vectype might be NULL and thus mode is derived from the scalar > stmt there. But ix86_builtin_vectorization

Re: [PATCH v2] aarch64: testsuite: Fix do-assemble tests for SME

On Wed, Jul 30, 2025 at 01:07:11PM +, Remi Machet wrote: > > On 7/29/25 17:29, Spencer Abson wrote: > > External email: Use caution opening links or attachments > > > > > > GCC doesn't support SME without SVE2, so the -march=armv8-a+ argument > > to > > check_no_compiler_messages causes aarch

[PATCH] [x86] factor out worker from ix86_builtin_vectorization_cost

The following factors out a worker that gets a mode argument rather than a vectype argument. That makes a difference when we hit the fallback in add_stmt_cost for scalar stmts where vectype might be NULL and thus mode is derived from the scalar stmt there. But ix86_builtin_vectorization_cost does

[Patch] Address compile time issues for locality cloning pass

This patch attempts to reduce compile time for locality cloning pass by reducing recursive calls to partition_callchain (). This is achieved by precomputing caller callee information into locality_info. locality_info stores all callees of a node, either directly or via inlined nodes thereby avo

Re: [PATCH v2] RISCV: MIPS prefetch extensions for MIPS RV64 P8700 and can be enabled with xmipscbop.

Hi All, Please do needful with reviewing the below changes (that enable mips custom prefetch instruction ) and your comments helps us to push more changes and stabilize the changes . Thank you ~U On Mon, Jul 21, 2025 at 9:04 AM Umesh Kalappa wrote: > Hi @Jeff Law , > > Please share your fee

[PATCH 2/2] Remove epilogue pattern fixup

The following removes the fixup we apply to pattern stmts before code generating vector epilogues. While I did expect this isn't necessary anymore since the SLP graph now exclusively records the data flow now, I expected "details" to mess this up. In particular 1/2 of this series fixes the one pl

[PATCH 1/2] Disallow scan-store vectorization in epilogues

The following disallows vectorizing epilogues containing scan-stores. Since code generation works by walking gimple stmts it is not ready for this when cleaning up epilogue vectorization. I believe scan-store vectorization needs most of the work done during SLP discovery to reflect the data flow.

Re: [PATCH] x86: Transform to "pushq $-1; popq reg" for -Oz

On Tue, Jul 29, 2025 at 11:37 PM Hongtao Liu wrote: > > On Wed, Jul 30, 2025 at 11:45 AM H.J. Lu wrote: > > > > commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 > > Author: H.J. Lu > > Date: Sun May 25 07:40:29 2025 +0800 > > > > x86: Enable *mov_(and|or) only for -Oz > > > > disabled trans

Minor auto-profile fixes

Hi, This patch silences warning about bad location in function_instance::match warning about profile containing record for line numbers that are not matched by the function body. While this is a bogus profile (and we will end up losing the profile data), create_gcov does not have enough informatio

Fix symbol_table::change_decl_assembler_name when DECL_RTL is computed

Hi, while working on patch assigning unique names to static symbols I noticed that fortran symbols are not renamed since the frontend calls make_decl_rtl. This gets DECL_ASSEMBBLER_NAME and DECL_RTL out of sync. I think we can drop that call, but it is also good idea to avoid this inconsistence, s

Re: [PATCH v2] aarch64: testsuite: Fix do-assemble tests for SME

On 7/29/25 17:29, Spencer Abson wrote: > External email: Use caution opening links or attachments > > > GCC doesn't support SME without SVE2, so the -march=armv8-a+ argument to > check_no_compiler_messages causes aarch64_asm__ok to return zero for SME > and any that implies it. This patch change

Re: [PATCH v3 0/3] aarch64: Stop using sys/ifunc.h header

On 7/30/25 13:18, Yury Khrustalev wrote: > External email: Use caution opening links or attachments > > > Regression has been checked on AArch64 and no regression has been > found. OK for trunk? Hi Yury, Looks good to me (but I am not an official approver or maintainer). Remi > > base commit:

Re: [PATCH] testsuite: Fix asm-hard-reg-error-{4,5}.c

On Tue, Jul 29, 2025 at 02:36:28PM -0700, Andrew Pinski wrote: > On Tue, Jul 29, 2025 at 6:58 AM Stefan Schulze Frielinghaus > wrote: > > > > From: Stefan Schulze Frielinghaus > > > > Targets hppa, m68k, pdp11, rx, sh, vax do not default to LRA. Since old > > reload pass is still used, add optio

Re: [PATCH] openmp: Allocate memory for private/firstprivate clauses as, directed by allocate clauses in target constructs [PR113436]

Hello Kwok, hi all, Kwok Cheung Yeung wrote: Currently, GCC accepts an allocate clause (to use a specific memory allocator and alignment) on the OpenMP target construct, but it has no effect - memory is always allocated with the defaults. This patch causes memory for privatized variables (i.e

Re: [PATCH v2 1/3] aarch64: Stop using sys/ifunc.h header in libatomic and libgcc

On 7/30/25 13:25, Yury Khrustalev wrote: External email: Use caution opening links or attachments Hi Remi On Wed, Jul 23, 2025 at 01:53:13PM +, Remi Machet wrote: On 7/23/25 04:45, Yury Khrustalev wrote: ... -#if __has_include() -#include -#else +/* The following struct is ABI-correc

Re: [PATCH] [sanitizer_common] Remove reference to obsolete termio ioctls (#138822)

On Fri, Jul 25, 2025 at 07:51:41PM +0100, Sam James wrote: > Cherry picked from LLVM commit c99b1bcd505064f2e086e6b1034ce0b0c91ea5b9. > > The termio ioctls are no longer used after commit 59978b21ad9c > ("[sanitizer_common] Remove interceptors for deprecated struct termio > (#137403)"), remove the

[PING][PATCH v3] config/rs6000/t-float128: Don't encode full build paths into headers

Hi All, Ping for https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689920.html It has already been approved here: https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689922.html with a note to commit it, but I don’t have commit access. Could someone please help commit it on my behalf? Thanks, H

Re: [PATCH v4 6/9] bitint: Make sure BEXTC checks extension when optimized

On Wed, Jul 30, 2025 at 01:07:32PM +0200, Jakub Jelinek wrote: > On Wed, Jul 30, 2025 at 06:52:40PM +0800, Yang Yujie wrote: > > I'm OK with your implementation. Just curious, do you mean that > > memcmp shouldn't be used on "(x)" at all? > > If there are any padding bits with undefined values, y

Re: [PATCH] testsuite: Fix gcc.target/i386/pr90579.c when PIE is enabled [PR118885]

Hi All, Please ignore this thread, I have sent v2 by updating commit header. Thanks, Harish From: Sadineni, Harish Sent: Wednesday, July 30, 2025 5:01 PM To: gcc-patches@gcc.gnu.org Cc: r...@cebitec.uni-bielefeld.de ; mikest...@comcast.net ; Kokkonda, Sundeep

[PATCH v2] testsuite: i386: Fix gcc.target/i386/pr90579.c when PIE is enabled [PR118885]

From: Harish Sadineni When gcc build with --enable-deafult-pie the following tests were getting failed: FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+40 FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+32 FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+24 FAI

Re: [PATCH] aarch64: Improve svdupq_lane expension for big-endian [PR121293]

Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Tuesday, July 29, 2025 1:43 PM >> To: gcc-patches@gcc.gnu.org >> Cc: Alex Coplan ; Alice Carlotti >> ; >> pins...@gmail.com; ktkac...@nvidia.com; Richard Earnshaw >> ; Tamar Christina ; >> Wilco Dijkstra >

[PATCH] testsuite: Fix gcc.target/i386/pr90579.c when PIE is enabled [PR118885]

From: Harish Sadineni When gcc build with --enable-deafult-pie the following tests were getting failed: FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+40 FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+32 FAIL: gcc.target/i386/pr90579.c scan-assembler vaddsd\tr\\+24 FAI

Re: [PATCH v2 2/3] testsuite: Add tests for __init_cpu_features_constructor

Hi Tamar and Andrew, On Tue, Jul 29, 2025 at 10:23:20AM -0700, Andrew Pinski wrote: > On Tue, Jul 29, 2025 at 1:44 AM Tamar Christina > wrote: > > > > ... > > > > > +/* { dg-do run } */ > > > +/* { dg-require-ifunc "" } */ > > > +/* { dg-options "-Wno-experimental-fmv-target" } */ > > > + > > >

Re: [PATCH v3 0/9] Add memtag-stack sanitizer using MTE instructions.

ping On 7/10/25 2:01 PM, claudiu.zissulescu-iancule...@oracle.com wrote: > From: Claudiu Zissulescu > > Hi, > > Please find a new series of patches that implememnts stack sanitizer > using AArch64 MTE instructions. This new series is based on Indu > previous patch series. > > What is new: > -

Re: [PATCH v2 1/3] aarch64: Stop using sys/ifunc.h header in libatomic and libgcc

Hi Remi On Wed, Jul 23, 2025 at 01:53:13PM +, Remi Machet wrote: > > On 7/23/25 04:45, Yury Khrustalev wrote: > > ... > > -#if __has_include() > -#include > -#else > +/* The following struct is ABI-correct description of the 2nd argument for an > + ifunc resolver as per SYSVABI spec (see

Re: [PATCH] tree-ssa-structalias: Put restrict keyword handling into its own file

On Wed 2025-07-30 12:41:09, Richard Biener wrote: > On Wed, 30 Jul 2025, Filip Kastl wrote: > > > Hi, > > > > What do you think, Richi? Ok to push? I wanted to split out this smaller > > portion before moving onto splitting out the constraint building. After > > that, > > I think I'll be done

[PATCH v4] opts: use sanitize_code_type for sanitizer flags

From: Indu Bhagat Hi Andrew, Please find the updated patch. Thank you, Claudiu Original message: Currently, the data type of sanitizer flags is unsigned int, with SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual enumerator for enum sanitize_code. Use 'sanitize_code_type' data

Re: [PATCH] aarch64: Use VNx16BI for more SVE WHILE* results [PR121118]

Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Tuesday, July 29, 2025 4:33 PM >> To: gcc-patches@gcc.gnu.org >> Cc: Alex Coplan ; Alice Carlotti >> ; >> pins...@gmail.com; ktkac...@nvidia.com; Richard Earnshaw >> ; Tamar Christina ; >> Wilco Dijkstra >

[PATCH v3 3/3] testsuite: Add runtime test for FMV resolvers

gcc/testsuite/ChangeLog: * g++.target/aarch64/mv-cpu-features.C: new test. --- .../g++.target/aarch64/mv-cpu-features.C | 82 +++ 1 file changed, 82 insertions(+) create mode 100644 gcc/testsuite/g++.target/aarch64/mv-cpu-features.C diff --git a/gcc/testsuite/g++.ta

[PATCH v3 2/3] testsuite: Add tests for __init_cpu_features_constructor

Add tests that would call __init_cpu_features_resolver() directly from an ifunc resolver that would in tern call the function under test __init_cpu_features_constructor() using synthetic parameters for different sizes of the 2nd argument. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ifun

Re: [PATCH v6 2/6] dwarf: create annotation DIEs for btf tags

On Tue, Jul 22, 2025 at 1:00 AM David Faust wrote: > > The btf_decl_tag and btf_type_tag attributes provide a means to annotate > declarations and types respectively with arbitrary user provided > strings. These strings are recorded in debug information for > post-compilation uses, and despite th

Re: [PATCH 06/12] aarch64: Use VNx16BI for floating-point svcmp*

Kyrylo Tkachov writes: >> +(define_insn "*aarch64_pred_fcmuo_acle" >> + [(set (match_operand:VNx16BI 0 "register_operand") > > Looks like a “”=w” constraint is missing here. Argh! Thanks for catching that. I went through and checked for missing constraints in the other new patterns but it look

[PATCH v3 1/3] aarch64: Stop using sys/ifunc.h header in libatomic and libgcc

This optional header is used to bring in the definition of the struct __ifunc_arg_t type. Since it has been added to glibc only recently, the previous implementation had to check whether this header is present and, if not, it provide its own definition. This creates dead code because either one of

[PATCH v3 0/3] aarch64: Stop using sys/ifunc.h header

Regression has been checked on AArch64 and no regression has been found. OK for trunk? base commit: 7aa9565a62e Changes in v3: - Amended tests based on feedback. - v2: https://inbox.sourceware.org/gcc-patches/20250723084524.84769-1-yury.khrusta...@arm.com/ Changes in v2: - Added tests (thank

Re: [PATCH 2/2] aarch64: Use VNx16BI for svrev_b* [PR121294]

Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Tuesday, July 29, 2025 5:20 PM >> To: Alex Coplan ; Alice Carlotti >> ; >> pins...@gmail.com; ktkac...@nvidia.com; Richard Earnshaw >> ; Tamar Christina ; >> Wilco Dijkstra ; gcc-patches@gcc.gnu.org >> Cc:

[PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data

The following adds vect_simd_clone_data as a container for vect type specific data for vectorizable_simd_clone_call and moves SLP_TREE_SIMD_CLONE_INFO there. Bootstrapped and tested on x86_64-unknown-linux-gnu. This time for a simpler candidate (and more immediately useful since it shrinks the SL

[PATCH 1/2] Use a class hierarchy for vect specific data

The following turns the union into a class hierarchy. One completed SLP_TREE_TYPE could move into the base class. * tree-vect-slp.cc (_slp_tree::_slp_tree): Adjust. (_slp_tree::~_slp_tree): Likewise. * tree-vectorizer.h (vect_data): New base class. (_slp_tree::u):

Re: [PATCH v5 2/11] openmp: Add support for iterators in map clauses (C/C++)

Hi Kwok, Kwok Cheung Yeung wrote: I find the following warning odd:    #pragma omp target map(iterator(i3=0:10, j3=0:20, k3=0:30), to: x[i3+j3], y[j3+k3], z[k3+i3]) ;    /* { dg-warning "iterator variable .i3. not used in clause expression" "" { target *-*-* } .-2 } */    /* { dg-warnin

Re: [patch,avr] Handle fallout from combine

On Wed, Jul 30, 2025 at 1:00 PM Georg-Johann Lay wrote: > > Insn combine may come up with superfluous reg-reg moves, where the > combine people say that these are no problem since reg-alloc is supposed > to optimize them. The issue is that the lower-subreg pass sitting > between combine and reg-a

Re: [PATCH v4 6/9] bitint: Make sure BEXTC checks extension when optimized

On Wed, Jul 30, 2025 at 06:52:40PM +0800, Yang Yujie wrote: > I'm OK with your implementation. Just curious, do you mean that > memcmp shouldn't be used on "(x)" at all? If there are any padding bits with undefined values, yes. So, e.g. don't use memcmp on addresses of _BitInt vars on x86_64/i686

Re: [PATCH v1 3/6] libstdc++: Improve low-rank layout_{left, right}::stride.

On 7/30/25 11:59, Tomasz Kaminski wrote: On Wed, Jul 30, 2025 at 10:56 AM Luc Grosheintz wrote: On 7/28/25 13:04, Tomasz Kaminski wrote: On Mon, Jul 28, 2025 at 10:24 AM Tomasz Kaminski wrote: On Mon, Jul 28, 2025 at 10:03 AM Luc Grosheintz < luc.groshei...@gmail.com> wrote:

[patch,avr] Handle fallout from combine

Insn combine may come up with superfluous reg-reg moves, where the combine people say that these are no problem since reg-alloc is supposed to optimize them. The issue is that the lower-subreg pass sitting between combine and reg-alloc may split such moves, coming up with a zoo of subregs which a

Re: [PATCH v0] libstdc++: mark __glibcxx_assert_fail as weak

Am 30.07.2025 um 08:45 schrieb Jonathan Wakely: On Tue, 29 Jul 2025, 14:34 Björn Schäpers, > wrote: From: Björn Schäpers mailto:bjo...@hazardy.de>> I want assertions to be enabled, while compiling for bare metal and I don't have any printf variants at my

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