On Thu, Jul 31, 2025 at 4:43 PM Florian Weimer wrote:
OK.
Thanks,
Richard.
> gcc/c/
>
> PR c/120055
> * c-typeck.cc (convert_arguments): Check if fundecl is null
> before checking for builtin function declaration.
>
> gcc/testsuite/
>
> * gcc.dg/Wdeprecated-non-p
On Thu, Jul 31, 2025 at 4:42 PM Florian Weimer wrote:
>
> Builtins defined with BT_FN_INT_VAR etc. show as functions without
> a prototype and trigger the warning.
OK.
Thanks,
Richard.
> gcc/c/
>
> PR c/119950
> * c-typeck.cc (convert_arguments): Check for built-in
> fun
ChangeLog/
* MAINTAINERS: Update my e-mail address.
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index d4ed3080641..6148ce069cb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,7 +653,7 @@ Christophe Lyon cl
> -Original Message-
> From: Richard Biener
> Sent: Friday, August 1, 2025 6:06 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data
>
>
>
> > Am 31.07.2025 um 17:43 schrieb Tamar Christina :
> >
> >
> >>
> Am 31.07.2025 um 17:43 schrieb Tamar Christina :
>
>
>>
>> -Original Message-
>> From: Richard Biener
>> Sent: Thursday, July 31, 2025 3:09 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Tamar Christina
>> Subject: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data
>>
>>
> Am 31.07.2025 um 22:03 schrieb Jakub Jelinek :
>
> Hi!
>
> The following testcase results in compiler UB as detected by ubsan.
> find_bswap_or_nop first checks is_bswap_or_nop_p and if that fails
> on the tmp_n value, tries some rotation of that if possible.
> The discovery what rotate coun
Hello,
This patch adds missing guards on shift amounts to prevent UB when the
shift count equals or exceeds HOST_BITS_PER_WIDE_INT.
Although the main undefined behavior issues were addressed in a previous
patch (r16-2666-g647bd0a02789f1), two cases remained where shift counts
were only checked fo
On Thu, Jul 24, 2025 at 8:43 AM Artemiy Granat wrote:
>
> gcc/ChangeLog:
>
> * config/i386/i386-options.cc (ix86_handle_cconv_attribute):
> Handle simultaneous use of regparm and thiscall attributes in
> case when regparm is set before thiscall.
>
> gcc/testsuite/ChangeLog:
Hi Paul,
While an error is correctly generated, the wording of
the error message iand locus seems odd. I have a
code that has
module foo
implicit none
private
generic, public :: bar => bar
generic, private :: bar => bah
...
end module
% gfcx -c a_gen4.F90
a_gen4.
Hello,
This patch adds missing guards on shift amounts to prevent UB when the
shift count equals or exceeds HOST_BITS_PER_WIDE_INT.
Although the main undefined behavior issues were addressed in a previous
patch (r16-2666-g647bd0a02789f1), two cases remained where shift counts
were only checked fo
This patch fixes the addition of strings so that no extraneous quotes
appear in the result string. The fix is made to the bootstrap tool mc
and it has been rebuilt.
gcc/m2/ChangeLog:
PR modula2/121314
* mc-boot/GFormatStrings.cc (PerformFormatString): Rebuilt.
* mc-boot/G
On Wed, 30 Jul 2025, John Ericson wrote:
> This macro deduplicates the
>
> $CC -v 2>&1 | sed -n 's/^Thread model: //p'
>
> check that was occurring in various runtime libs.
>
> Additionally, as a bit of an Easter egg, this also allows overriding
> what the compiler would return by setting t
On Wed, 30 Jul 2025, John Ericson wrote:
> My goal is to be able to build libgcc cleanly in isolation --- today one
> needs to figure `make ...` misc things in the gcc subdir.
>
> Following Andrew Pinski's suggestions in
> https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689683.html, this
> co
On Tue, 29 Jul 2025, Martin Uecker wrote:
> Fixes an ICE on invalid code (15/16 regression).
>
> Bootstrapped and regression tested on x86_64.
>
>
> c: Fix ICE on invalid code involving bit fields [PR121217]
>
> Under some error condition we can end up with NULL_TREEs for
> the
On Thu, Jul 31, 2025 at 01:34:14PM -0700, Steve Kargl wrote:
>
> It seems that
>
> module foo
> implicit none
> private
> public bar
> generic :: bar => bar, bah
> end module
>
> is not accepted.
>
As a follow-up, this is accepted with your patch.
module foo
implicit none
pr
On Wed, Jul 23, 2025 at 05:53:17PM +0100, Paul Richard Thomas wrote:
>
>
> Regtests on x86_64/FC42 - OK for mainline?
>
Here's another testcase that fails.
% gfcx -o z a_gen2.F90 && ./z
42.000
43.500
% gfcx -o z -DGEN a_gen2.F90
a_gen2.F90:9:21:
9 |generic :: ba
On Thu, Jul 24, 2025 at 06:38:26PM +0300, Artemiy Granat wrote:
> gcc/ChangeLog:
>
> * config/i386/i386-options.cc (ix86_handle_cconv_attribute):
> Handle simultaneous use of regparm and thiscall attributes in
> case when regparm is set before thiscall.
>
> gcc/testsuite/ChangeL
On Wed, Jul 23, 2025 at 05:53:17PM +0100, Paul Richard Thomas wrote:
>
> The attached implements the F2018 generic statement, which has the same
> semantics as the typebound version but can appear in any specification
> statement.
>
> As it says in the first comment in the patch, use is made of t
Hi!
The following patch introduces a -Wkeyword-macro warning that clang has
since 2014 to implement part of C++26 P2843R3 Preprocessing is never undefined
paper.
The relevant change in the paper is moving [macro.names]/2 paragraph to
https://eel.is/c++draft/cpp.replace.general#9 :
"A translation u
Hi!
The following testcase results in compiler UB as detected by ubsan.
find_bswap_or_nop first checks is_bswap_or_nop_p and if that fails
on the tmp_n value, tries some rotation of that if possible.
The discovery what rotate count to use ignores zero bytes from
the least significant end (those me
On Thu, 24 Jul 2025, Aaron Ballman wrote:
> Question on the .N syntax: I thought I heard that this was something
> GCC could handle, but that it still requires late parsing to ensure
> type information for N is available and that was a problem. e.g.,
>
> void func(char *buffer __counted_by(.N * s
Am 31.07.25 um 12:30 schrieb Denis Chertykov:
ср, 30 июл. 2025 г. в 14:59, Georg-Johann Lay :
Insn combine may come up with superfluous reg-reg moves, where the
combine people say that these are no problem since reg-alloc is supposed
to optimize them. The issue is that the lower-subreg pass si
Tested x86_64-pc-linux-gnu, applying to trunk and 15.
-- 8< --
Here cxx_eval_vec_init_1 wants to recreate the default constructor call that
we previously built and threw away in build_vec_init_elt, but we aren't in
the same access context at this point. Since we already checked access,
let's jus
While building GCC with --with-build-config=bootstrap-ubsan on
powerpc64le-unknown-linux-gnu, multiple UBSAN runtime errors were
encountered in rs6000.cc and rs6000.md due to undefined behavior
involving left shifts on negative values and shift exponents equal to
or exceeding the type width.
The i
On Thu, Jul 31, 2025 at 11:04:56AM -0400, Jason Merrill wrote:
> If the current backup handling is doing the wrong thing in this case, it
> seems better to fix it rather than add more earlier in the function. Would
> it be enough to move the existing CPP_PRAGMA_EOL handling into the
> not_module bl
On Wed, 23 Jul 2025, Aleksandar Rakic wrote:
> Public
>
> Hi,
>
> > So I'm not at all concerned about the mips specific bits of this patch.
> > After all, they only affect mips ports and the changes seem sensible.
> > They would need a ChangeLog entry to go forward through.
>
> > What is concer
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> After previous patches, we should always get a VNx16BI result
> for ACLE intrinsics that return svbool_t. This patch adds
> an assert that checks a more general condition than that.
>
Ok.
Thanks,
Kyrill
> gcc/
> * config/aarch64/aarc
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the predicate forms of svdupq.
>
> The general predicate expansion builds an equivalent integer vector
> and then compares it wit
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the predicate forms of svdup.
>
Ok.
Thanks,
Kyrill
> gcc/
> * config/aarch64/aarch64-protos.h
> (aarch64_emit_sve_pred_vec_dupl
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the svpnext* intrinsics.
>
I wonder if the new patterns need pred_clobber alternatives in this and the
other patches?
If they d
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the svmatch* and svnmatch*
> intrinsics.
>
Ok.
Thanks,
Kyrill
> gcc/
> * config/aarch64/aarch64-sve2.md (@aarch64_pred_):
> Spl
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the svac* intrinsics (floating-
> point compare absolute).
Ok.
Thanks,
Kyrill
>
> gcc/
> * config/aarch64/aarch64-sve.md (@aarc
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the svcmp*_wide intrinsics.
>
> Since the only uses of these patterns are for ACLE intrinsics,
> there didn't seem much point add
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> Patterns that fuse a predicate operation P with a PTEST use
> aarch64_sve_same_pred_for_ptest_p to test whether the governing
> predicates of P and the PTEST are compatible. Most patterns were also
> written as define_insn_and_rewrites,
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> The patterns for the svcmp_wide intrinsics used a VNx16BI
> input predicate for all modes, instead of the usual .
> That unnecessarily made some input bits significant, but more
> importantly, it triggered an ICE in aarch64_sve_same_pred
> On 29 Jul 2025, at 18:41, Richard Sandiford wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the non-widening integer forms
> of svcmp*. The handling of the PTEST patterns is similar to that
> for the earlier svwhile* patc
This patch adds appropriate .type for jump table data.
Applied as obvious.
Johann
--
AVR: Set .type of jump table label.
gcc/
* config/avr/avr.cc (avr_output_addr_vec) : Asm out its
.type.
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index 94684468de3..1fb59b624de 1006
When building with LTO, DECL_VINDEX is not always set for virtual
functions, which allows virtual functions to be incorrectly treated as
non-virtual and then being multi-versioned, and causes errors sometimes.
This patch addresses the issue by ensuring that we also check
DECL_VIRTUAL_P in addition
This is a regression present on the mainline and 15 branch: the GNAT tools are
miscompiled with -march=znver3 in C[XX]FLAGS because the throw and catch sides
of the Ada exception machinery disagree about the BIGGEST_ALIGNMENT setting.
Bootstrapped/regtested on x86-64/Linux, applied on the mainli
> -Original Message-
> From: Richard Biener
> Sent: Thursday, July 31, 2025 3:09 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Tamar Christina
> Subject: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data
>
> The following adds vect_simd_clone_data as a container for vect
> type sp
Alfie Richards writes:
> diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
> index 5e305643b3a..253ea6dd77f 100644
> --- a/gcc/doc/tm.texi
> +++ b/gcc/doc/tm.texi
> @@ -12268,6 +12268,11 @@ function version at run-time for a given set of
> function versions.
> body must be generated.
> @end deftyp
On Thu, Jul 31, 2025 at 8:11 AM Alexander Monakov wrote:
>
>
> On Thu, 31 Jul 2025, H.J. Lu wrote:
>
> > > We have a few pre-existing tests that verify that the attribute is
> > > honored,
> > > such as those added by commit 1d561e1851c4. Do they actually not fail with
> > > this patch?
> >
> > T
On Thu, Jul 31, 2025 at 04:31:14PM +0200, Jens Remus wrote:
> Hello Stefan!
>
> On 7/10/2025 4:16 PM, Stefan Schulze Frielinghaus wrote:
> > So far only a per thread canary in the TLS block is supported. This
> > patch adds support for a global canary, too. For this the new option
> > -mstack-pr
> -Original Message-
> From: Kyrylo Tkachov
> Sent: Thursday, July 31, 2025 3:47 PM
> To: Jennifer Schmitz
> Cc: GCC Patches ; Andrew Pinski
> ; Richard Earnshaw ; Richard
> Sandiford ; Tamar Christina
> ; Alex Coplan
> Subject: Re: [PATCH 3/3] AArch64: Enable dispatch scheduling for Neo
On Thu, 31 Jul 2025, H.J. Lu wrote:
> > We have a few pre-existing tests that verify that the attribute is honored,
> > such as those added by commit 1d561e1851c4. Do they actually not fail with
> > this patch?
>
> There are no regressions.
Sorry, I don't see how that would be possible, that's
On 6/27/25 5:54 PM, Jakub Jelinek wrote:
Hi!
My changes for "Module Declarations Shouldn’t be Macros" paper broke
the following testcase. The backup handling intentionally tries to
drop CPP_PRAGMA_EOL token if things go wrong, which is desirable for the
case where we haven't committed to the mo
Since the cris port was added to gcc it has passed --em=criself
to gas, as an abbreviation for --emulation=criself. Starting with
binutils-2.45 that causes a hard error in gas due to ambiguity with
another option.
Fixed by replacing the abbreviation with the complete option.
Tested by building a
On Thu, Jul 31, 2025 at 6:58 AM Alexander Monakov wrote:
>
>
> On Wed, 30 Jul 2025, H.J. Lu wrote:
>
> > According to the TLS spec, linker can optimize the TLS access by
> > overriding the TLS access model. Do the same in compiler by using
> > the default TLS mode if it is more optimized than the
On Thu, 31 Jul 2025, Jason Merrill wrote:
> On 7/30/25 5:48 PM, Patrick Palka wrote:
> > On Wed, 30 Jul 2025, Patrick Palka wrote:
> >
> > > On Wed, 30 Jul 2025, Patrick Palka wrote:
> > >
> > > > On Wed, 30 Jul 2025, Patrick Palka wrote:
> > > >
> > > > > Bootstrapped and regtested on x86_64-p
On Wed, Jul 30, 2025 at 02:13:48PM -0700, Andrew Pinski wrote:
> On Wed, Jul 30, 2025 at 4:18 AM Yury Khrustalev
> wrote:
> >
> > This optional header is used to bring in the definition of the
> > struct __ifunc_arg_t type. Since it has been added to glibc only
> > recently, the previous implemen
> On 29 Jul 2025, at 17:14, Jennifer Schmitz wrote:
>
> This patch adds dispatch constraints for Neoverse V2 and illustrates the steps
> necessary to enable dispatch scheduling for an AArch64 core.
>
> The dispatch constraints are based on section 4.1 of the Neoverse V2 SWOG.
> Please note tha
On 7/30/25 5:48 PM, Patrick Palka wrote:
On Wed, 30 Jul 2025, Patrick Palka wrote:
On Wed, 30 Jul 2025, Patrick Palka wrote:
On Wed, 30 Jul 2025, Patrick Palka wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look
OK for trunk?
-- >8 --
Here the result of A::make(0, 0,
On 7/30/25 7:37 PM, Patrick Palka wrote:
On Thu, 31 Jul 2025, Nathaniel Shead wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
And maybe 15?
Good catch re the invisiref handling! This LGTM, Jason what do you
think?
OK for trunk and 15.
-- >8 --
When we merge a fu
gcc/c/
PR c/120055
* c-typeck.cc (convert_arguments): Check if fundecl is null
before checking for builtin function declaration.
gcc/testsuite/
* gcc.dg/Wdeprecated-non-prototype-6.c: New test.
(cherry picked from commit 02fa088f5b61fb5ddfff9e2dc0c0404450e7c6a4)
Builtins defined with BT_FN_INT_VAR etc. show as functions without
a prototype and trigger the warning.
gcc/c/
PR c/119950
* c-typeck.cc (convert_arguments): Check for built-in
function declaration before warning.
gcc/testsuite/
* gcc.dg/Wdeprecated-non-prototype
On 7/31/25 10:34 AM, Jason Merrill wrote:
On 7/29/25 8:10 AM, Nathaniel Shead wrote:
Thoughts? Another suggestion raised on the PR was to just make this a
warning or some other non-fatal diagnostic (I suppose not attached to
any particular warning option?) and continue translation; I'm not
part
On 7/29/25 8:10 AM, Nathaniel Shead wrote:
Thoughts? Another suggestion raised on the PR was to just make this a
warning or some other non-fatal diagnostic (I suppose not attached to
any particular warning option?) and continue translation; I'm not
particularly fussed either way.
An unconditio
Hello Stefan!
On 7/10/2025 4:16 PM, Stefan Schulze Frielinghaus wrote:
> So far only a per thread canary in the TLS block is supported. This
> patch adds support for a global canary, too. For this the new option
> -mstack-protector-guard={global,tls} is added which defaults to tls.
To be on par
zlib/ChangeLog:
* configure: Regenerate.
* configure.ac: Set version to 1.3.1.
---
Pushed obvious followup to zlib sync.
zlib/configure| 20 ++--
zlib/configure.ac | 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/zlib/configure b/zlib/
> On 31 Jul 2025, at 14:34, Tejas Belagod wrote:
>
> The test was unsafe when tested on different vector lengths. This patch
> fixes it to work on all lengths.
>
Ok. I’ve seen this test fail on GCC 15 branch too, do we want this fix there as
well?
Thanks,
Kyrill
> gcc/testsuite/ChangeLog
>
The following adds vect_simd_clone_data as a container for vect
type specific data for vectorizable_simd_clone_call and moves
SLP_TREE_SIMD_CLONE_INFO there.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
Any further considerations?
Thanks,
Richard.
* tree-vectorizer.h (vect_simd_
The following turns the union into a class hierarchy. One completed
SLP_TREE_TYPE could move into the base class.
* tree-vect-slp.cc (_slp_tree::_slp_tree): Adjust.
(_slp_tree::~_slp_tree): Likewise.
* tree-vectorizer.h (vect_data): New base class.
(_slp_tree::u):
On Wed, 30 Jul 2025, H.J. Lu wrote:
> According to the TLS spec, linker can optimize the TLS access by
> overriding the TLS access model. Do the same in compiler by using
> the default TLS mode if it is more optimized than the TLS model
> attribute.
>
> gcc/
>
> PR c/121318
> * do
On Linux/x86_64,
0340177d54d08b6375391ba164a878e6a596275e is the first bad commit
commit 0340177d54d08b6375391ba164a878e6a596275e
Author: Andrew Pinski
Date: Tue Jul 29 21:49:16 2025 -0700
simplify-rtx: Add `(subreg (not a))` simplification for word_mode [PR121308]
caused
FAIL: gcc.targe
On Linux/x86_64,
965564eafb721f813a3112f1bba8d8fae32b is the first bad commit
commit 965564eafb721f813a3112f1bba8d8fae32b
Author: Richard Sandiford
Date: Tue Jul 29 15:58:34 2025 +0100
simplify-rtx: Simplify subregs of logic ops
caused
FAIL: c-c++-common/dfp/convert-bfp-2.c execu
This is follow-up to
https://gcc.gnu.org/pipermail/gcc-patches/2025-July/691000.html
-- >8 --
From: Stefan Schulze Frielinghaus
Hard register constraints are only supported for LRA and not old reload.
Targets hppa, m68k, pdp11, rx, sh, vax do not default to LRA which is
why these tests fail the
On Tue, Jul 29, 2025 at 11:26:40PM +0200, Georg-Johann Lay wrote:
> Am 29.07.25 um 15:56 schrieb Stefan Schulze Frielinghaus:
> > From: Stefan Schulze Frielinghaus
> >
> > Targets hppa, m68k, pdp11, rx, sh, vax do not default to LRA. Since old
> > reload pass is still used, add option -mlra for
On 7/31/25 7:12 AM, Marek Polacek wrote:
On Thu, Jul 31, 2025 at 11:43:17AM +0200, Richard Biener wrote:
On Sat, Jun 28, 2025 at 12:31 AM Jason Merrill wrote:
On 6/26/25 4:12 PM, Marek Polacek wrote:
On Wed, Jun 25, 2025 at 03:13:25PM -0400, Jason Merrill wrote:
On 6/25/25 1:28 PM, Marek Po
Notes:
This patch optimizes out calls to __dynamic_cast when the type being cast
to is final (or its destructor), replacing them with a simple comparison of the
types' vtable addresses. This is already implemented and done by default in
clang (https://review
s.llvm.org/D154658), but can
These changes were committed to trunk.
From: Robert Dubner
Date: Wed, 30 Jul 2025 09:54:13 -0400
Subject: [PATCH] cobol: Eliminate various errors. [PR120244]
The following coding errors were located by running extended tests
through valgrind. These changes repair the errors.
gcc/cobol/ChangeL
Passed the CI, will commit it soon.
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, July 30, 2025 2:26 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com; Chen, Ken ; Liu, Hongtao
; Li, Pan2
Subject: [PATCH
On 7/30/25 7:03 PM, Marek Polacek wrote:
On Wed, Jul 30, 2025 at 03:30:06PM -0400, Jason Merrill wrote:
On 7/25/25 3:59 PM, Marek Polacek wrote:
On Tue, Jul 22, 2025 at 04:52:53PM -0400, Jason Merrill wrote:
On 7/21/25 6:28 PM, Marek Polacek wrote:
On Mon, Jul 21, 2025 at 11:26:08AM -0400, Ja
The following fixes up the r16-2593-g6ac78317aa6adf change which
made us match up a scalar with a vector type. Oops.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Noticed when removing the gather/scatter pattern that creates the
IFNs early.
* tree-vect-stmts.cc (get_group_l
On Thu, Jul 31, 2025 at 2:56 PM Tamar Christina wrote:
>
> Yeah I did think that as well, however what I observed was that if the main
> loop is unrolled because we set the upper bound on loop itself we end up just
> fully unrolling.
>
> And no matter how high I made the VF it would still fully
Yeah I did think that as well, however what I observed was that if the main
loop is unrolled because we set the upper bound on loop itself we end up just
fully unrolling.
And no matter how high I made the VF it would still fully unroll the epilogue
so it still wouldn't iterate.
Then of course
FWIW, I agree with Jeff's comment in the v6 series against the duplication
of is_valid_asm_symbol and create_new_asm_name. On the aarch64 bits:
Alfie Richards writes:
> @@ -20549,18 +20540,6 @@ aarch64_mangle_decl_assembler_name (tree decl, tree
> id)
> This is computed by taking the defaul
On 09.07.2025 14:48, Matthieu Longo wrote:
> Those methods's implementation is relying on duck-typing at compile
> time.
> The structure corresponding to the node of a doubly linked list needs
> to define attributes 'prev' and 'next' which are pointers on the type
> of a node.
> The structure wrapp
Update test error message as svbool_t is now treated as a GNU vector.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/sve/acle/general-c/svcount_1.c: Update message.
---
gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/svcount_1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
Support a subset of C/C++ operations (bitwise, conditional etc.) on svbool_t.
gcc/ChangeLog:
* c-family/c-common.cc (c_build_vec_convert): Support vector boolean
types for __builtin_convertvector ().
(c_common_bool_type): New. Given precision and signedness, return the
Update existing compile test with tests to cover C/C++ operations on svbool_t
type objects.
gcc/testsuite/ChangeLog:
* g++.dg/ext/sve-sizeless-1.C: Add new tests.
* g++.dg/ext/sve-sizeless-2.C: Add new tests.
* g++.target/aarch64/sve/acle/general-c++/gnu_vectors_1.C: Add n
This is a follow-up to a series posted earlier this year:
https://gcc.gnu.org/pipermail/gcc-patches/2025-March/677053.html
Sorry to have dropped the ball on this. I've separated out the index operator
into a separate patch which I post subsequently. Tested and bootstrapped on
aarch64-linux-gnu an
The test was unsafe when tested on different vector lengths. This patch
fixes it to work on all lengths.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/sve/acle/general/cops.c: Fix test.
---
gcc/testsuite/gcc.target/aarch64/sve/acle/general/cops.c | 8
1 file changed, 4 insertion
On Thu, Jul 31, 2025 at 2:10 PM Tamar Christina wrote:
>
> Hi All,
>
> The testcases in the PR are failing due to the code trying to set a vector
> range
> on an epilogue.
>
> However on epilogues the range doesn't make sense. In particular we are
> setting
> ranged to help niters analysis. But
The following allows to specify the valueization hook to be used.
Bootstrap and regtest in progress on x86_64-unknown-linux-gnu.
Found this in one of my trees, unused. But it makes the APIs
more consistent at least.
* gimple-fold.h (fold_stmt_inplace): Add valueization hook
argu
I have been running all of my extensive tests through valgrind and picking
off errors, one by one. I found logic in gcc/real.cc that has an
inconsequential read of an uninitialized memory location. This change
eliminates that warning.
Is the following patch okay for trunk?
>From fffd7c46b2796e5f
Hi All,
The testcases in the PR are failing due to the code trying to set a vector range
on an epilogue.
However on epilogues the range doesn't make sense. In particular we are setting
ranged to help niters analysis. But the epilogue doesn't iterate.
Secondly the bounds variable hasn't been adj
On Thu, 31 Jul 2025, Richard Biener wrote:
> On Thu, 31 Jul 2025, Tamar Christina wrote:
>
> > > -Original Message-
> > > From: Richard Biener
> > > Sent: Wednesday, July 30, 2025 12:17 PM
> > > To: gcc-patches@gcc.gnu.org
> > > Cc: Tamar Christina
> > > Subject: [PATCH 2/2] Put SLP_TRE
On Thu, 31 Jul 2025, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Wednesday, July 30, 2025 12:17 PM
> > To: gcc-patches@gcc.gnu.org
> > Cc: Tamar Christina
> > Subject: [PATCH 2/2] Put SLP_TREE_SIMD_CLONE_INFO into type specifc data
> >
> > The follow
The multiplication by BITS_PER_UNIT should be done in poly_offset_int.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
PR tree-optimization/121320
* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Convert
op->off to poly_offset_int before multiplying by
We should check the offset fits a HWI when multiplied to be in bits.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
PR tree-optimization/121323
* tree-ssa-alias.cc (ao_ref_init_from_ptr_and_range): Check
the pointer offset fits in a HWI when represented in bits
On Thu, 31 Jul 2025, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Thursday, July 31, 2025 12:27 PM
> > To: gcc-patches@gcc.gnu.org
> > Cc: Tamar Christina
> > Subject: [PATCH] Add checks for node in aarch64 vector cost modeling
> >
> > After removing
> -Original Message-
> From: Richard Biener
> Sent: Thursday, July 31, 2025 12:27 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Tamar Christina
> Subject: [PATCH] Add checks for node in aarch64 vector cost modeling
>
> After removing STMT_VINFO_MEMORY_ACCESS_TYPE we now ICE when costing
> for s
On Thu, Jul 31, 2025 at 01:23:00PM +0200, Richard Biener wrote:
> On Thu, 31 Jul 2025, Richard Biener wrote:
>
> > On Thu, 31 Jul 2025, Spencer Abson wrote:
> >
> > > On Thu, Jul 31, 2025 at 12:14:20PM +0200, Richard Biener wrote:
> > > > On Tue, 29 Jul 2025, Richard Biener wrote:
> > > >
> > >
After removing STMT_VINFO_MEMORY_ACCESS_TYPE we now ICE when costing
for scalar stmts required in the epilog since the cost model tries
to pattern-match gathers (an earlier patch tried to improve this
by introducing stmt groups, but that was on hold due to negative
feedback). The following shot-cu
On Thu, 31 Jul 2025, Richard Biener wrote:
> On Thu, 31 Jul 2025, Spencer Abson wrote:
>
> > On Thu, Jul 31, 2025 at 12:14:20PM +0200, Richard Biener wrote:
> > > On Tue, 29 Jul 2025, Richard Biener wrote:
> > >
> > > > This should be present only on SLP nodes now. The RISC-V changes
> > > > ar
The NoOffload flag was introduced recently (commit "Don't pass vector params
through to offload targets").
gcc/ChangeLog:
* doc/options.texi: Document NoOffload.
---
gcc/doc/options.texi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi
On Thu, Jul 31, 2025 at 11:43:17AM +0200, Richard Biener wrote:
> On Sat, Jun 28, 2025 at 12:31 AM Jason Merrill wrote:
> >
> > On 6/26/25 4:12 PM, Marek Polacek wrote:
> > > On Wed, Jun 25, 2025 at 03:13:25PM -0400, Jason Merrill wrote:
> > >> On 6/25/25 1:28 PM, Marek Polacek wrote:
> > >>> @@ -
hmm...then I incline those intrinsic just put static inline
function with inline asm rather than adding pattern and "real"
intrinsic
On Wed, Jul 30, 2025 at 2:34 PM KuanLin Chen wrote:
>
> Hi Kito,
>
> Kito Cheng 於 2025年7月30日 週三 上午9:01寫道：
> >
> > > +(define_insn "@nds_vfwcvt_bf16"
> > > + [
On Thu, 31 Jul 2025, Spencer Abson wrote:
> On Thu, Jul 31, 2025 at 12:14:20PM +0200, Richard Biener wrote:
> > On Tue, 29 Jul 2025, Richard Biener wrote:
> >
> > > This should be present only on SLP nodes now. The RISC-V changes
> > > are mechanical along the line of the SLP_TREE_TYPE changes.
On Thu, Jul 31, 2025 at 12:14:20PM +0200, Richard Biener wrote:
> On Tue, 29 Jul 2025, Richard Biener wrote:
>
> > This should be present only on SLP nodes now. The RISC-V changes
> > are mechanical along the line of the SLP_TREE_TYPE changes. The
> > aarch64 changes are for removing vect_mem_ac
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