On Thu, Aug 7, 2025 at 2:50 PM Takayuki 'January June' Suwa
wrote:
>
> References to literal pool entries do not need to be reloaded or converted
> to "(mem (reg X))" to load via base register.
>
> gcc/ChangeLog:
>
> * config/xtensa/constraints.md (T):
> Change define_memory_constr
Sam James writes:
> David Malcolm writes:
>
>> [...]
>> Test bootstrap on x86_64 in progress. Is there an easy way to force
>> the bootstrap to use 32-bit?
>
> Try ~/git/gcc/configure --host=i686-pc-linux-gnu
> --build=i686-pc-linux-gnu --target=i686-pc-linux-gnu CC="gcc -m32"
> CXX="g++ -m32".
David Malcolm writes:
> [...]
> Test bootstrap on x86_64 in progress. Is there an easy way to force
> the bootstrap to use 32-bit?
Try ~/git/gcc/configure --host=i686-pc-linux-gnu
--build=i686-pc-linux-gnu --target=i686-pc-linux-gnu CC="gcc -m32"
CXX="g++ -m32".
Looks like I broke the build with r16-3091-gac4e7455a33237 on hosts
where unsigned == size_t.
../../gcc/gcc/diagnostics/dumping.cc:98:1: error: redefinition of ‘void
diagnostics::dumping::emit_field(FILE*, int, const char*, T) [with T = unsigned
int; FILE = FILE]’
98 | emit_field (FILE *outfi
Fair point, I've sent https://sourceware.org/pipermail/newlib/2025/022085.html
to the the newlib mailing list, doing the same change, with the email body /
commit message asking them just that question. Fingers crossed!
John
On Fri, Aug 8, 2025, at 4:24 PM, Joseph Myers wrote:
> On Thu, 7 Aug 2
On Thu, Aug 7, 2025 at 4:29 AM Richard Biener
wrote:
>
> On Wed, Aug 6, 2025 at 7:30 PM Andrew Pinski wrote:
> >
> > While looking into the gimple level after optimization of the highway code
> > from google, I noticed in .optimized we still have:
> > ```
> > MEM [(short int *)&a] = { 0, 0, 0,
No functional change intended.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r16-3089-gd7d0ea918fad92.
gcc/cp/ChangeLog:
* error.cc (cp_adjust_diagnostic_info): Convert "context" arg from
ptr to const &.
gcc/ChangeLog:
* diagnostics/con
On 8/8/25 21:21, Richard Sandiford wrote:
+if (GET_MODE_CLASS (ccmode) == MODE_CC)
+ gcc_assert (XEXP (operands[1], 1) == const0_rtx);
Sorry for the formatting nit, but: too much indentation.
Whoops, incomplete removal of braces. :-)
r~
On 8/8/25 21:08, Richard Sandiford wrote:
Let's change it to:
/* { dg-do assemble { target aarch64_asm_cmpbr_ok } } */
/* { dg-do compile { target { ! aarch64_asm_cmpbr_ok } } } */
That was the original plan, and is used extensively in other aarch64 tests.
We changed it to use dg-do-if after Ri
No functional change intended.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r16-3090-gf14fee14d440cf.
gcc/ChangeLog:
* diagnostic.h (diagnostics::get_cwe_url): Move decl to
diagnostics/metadata.h.
(diagnostics::maybe_line_and_column): M
The diagnostics subsystem has a handy dump feature, usable
during debugging via
(gdb) call global_dc->dump ()
which prints copious amounts of information about the state
of the diagnostics subsystem to stderr.
This patch consolidates the implementation and extends it, adding
various per-sink d
In GCC 15 I added an experimental nesting view in text sinks
for hierarchical diagnostics, such as C++ template problems.
This patch enables it for text sinks by default. The old
behavior can be restored via -fno-diagnostics-show-nesting,
which the patch also adds to -fdiagnostics-plain-output.
Consolidate 3 fields in diagnostics::context and
diagnostics::column_policy into a new struct
diagnostics::column_options.
No functional change intended; reduces the number of public
fields in diagnostics::context.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as
On 8/8/25 21:18, Richard Sandiford wrote:
+(define_insn "*aarch64_cb"
+ [(set (pc) (if_then_else
+ (INT_CMP
+ (match_operand:GPI 0 "register_operand" "r")
+ (match_operand:GPI 1
+ "" "r"))
An alternative to adding a new code attri
On 8/8/25 20:39, Richard Sandiford wrote:
Richard Henderson writes:
The save/restore_stack_nonlocal patterns passed a DImode rtx
to gen_tbranch_neqi3 for a QImode compare. The tbranch expander
did not do what it said on the tin, that is: emit TBNZ.
It only made it as far as AND+CMP+B.cond.
Y
On Fri, 1 Aug 2025, Qing Zhao wrote:
> + /* For a poiner array address as:
"poiner" should be "pointer".
OK with that fix, in the absence of objections within the next week from
other maintainers or reviewers.
--
Joseph S. Myers
josmy...@redhat.com
On Thu, Aug 7, 2025 at 4:27 AM Richard Biener
wrote:
>
> On Thu, Aug 7, 2025 at 1:22 PM Richard Biener
> wrote:
> >
> > On Wed, Aug 6, 2025 at 7:29 PM Andrew Pinski
> > wrote:
> > >
> > > One thing I noticed while working on copy prop for aggregates is that we
> > > start with
> > > a memcpy l
On Thu, 7 Aug 2025, John Ericson wrote:
> The VPATH workaround however is akin to:
>
> mkdir -p $build/mach0/mach1/libgcc
> cd $build/mach0/mach1/libgcc
> ln -s $gcc_source/libgcc/* ./
> ./configure
>
> and it's that --- using the build dir with the symlinked sources inside
> as the src/obj dir
> Is that done automatically or do you need to write an explicit
> disable_interrupts()
> before you use FP/SIMD operations?
I want to thank you for introducing some much needed clarity on this
topic.
We held an informal chat amongst a few Zephyr toolchain developers on
this topic, and I think
From: Andrew Pinski
Just updating with my new email address.
ChangeLog:
* MAINTAINERS (Andrew Pinski): Update email address.
Signed-off-by: Andrew Pinski
---
MAINTAINERS | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index bc607cb50
This adds a warning for returning the address of a nested function
where this is dangerous.
c: Warn when returning nested functions that require a non-local context.
This patch adds a mechanism to keep track whether nested functions require
non-local context because they refere
From: Robert Dubner
Date: Fri, 8 Aug 2025 13:04:53 -0400
Subject: [PATCH] cobol: Divide-and-conquer conversion from binary to
packed-decimal.
The legacy routine for converting a binary integer to a packed-decimal
representaion peeled two digits at a time from the bottom of an _int128
value.
These
On Thu, Aug 07, 2025 at 10:02:33PM +0100, Paul Richard Thomas wrote:
> Hi Jerry et al.,
>
> I attached an earlier version of the patch - apologies!
>
> Please find the latest attached.
>
Thanks for taking my comments into account. The
patch passes regression testing on amf64-*-freebsd.
The on
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK
for trunk?
-- >8 --
At some point these flag start getting defined in terms of the previous
flag, which is inconvenient when we want to test if the flag is set
during a debugging session since we don't immediately know its actua
On 08/08/2025 15:59, Andre Vieira (lists) wrote:
Fix the bound checking for the opc1 operand of the following intrinsics:
__arm_mcrr
__arm_mcrr2
__arm_mrrc
__arm_mrrc2
Built arm-none-linux-gnueabihf and ran full regression test, and built
arm-none-eabi but only ran the changed tests
writes:
> From: Alfie Richards
>
> Adds an optimisation in FMV to redirect to a specific target if possible.
>
> A call is redirected to a specific target if both:
> - the caller can always call the callee version
> - and, it is possible to rule out all higher priority versions of the callee
>
On 20/05/2025 05:28, Alexandre Oliva wrote:
(The backport I've only just posted is not enough for the tests to pass;
there's another problem)
r14-10824 is a backport of r15-4549, that rewrote and extended into
check-function-bodies the save/restore expectations introduced in
r15-2160. Alas, r1
On 08/08/2025 16:56, Christophe Lyon wrote:
On Fri, 8 Aug 2025 at 16:51, Richard Earnshaw wrote:
On 26/05/2025 17:08, Christophe Lyon wrote:
This effective target implicitly expects -march=armv8-a, otherwise
with a toolchain configured for instance with
--with-cpu=cortex-m0 --with-float=soft,
On 08/08/2025 16:49, Christophe Lyon wrote:
On Fri, 8 Aug 2025 at 17:04, Richard Earnshaw wrote:
On 04/07/2025 23:00, Christophe Lyon wrote:
Like we do in other effective-targets, add
"-mcpu=unset -march=armv8-a"
directly when setting et_arm_v8_neon_flags in arm_v8_neon_ok_nocache,
to avoid h
On Fri, 8 Aug 2025 at 16:58, Richard Earnshaw wrote:
>
> On 04/07/2025 23:00, Christophe Lyon wrote:
> > A few arm effective-targets call check_effective_target_arm32 even
> > though they would force a -march=XXX flag which supports Arm and/or
> > Thumb-2, thus making the arm32 check useless. Thi
On Fri, 8 Aug 2025 at 16:51, Richard Earnshaw wrote:
>
> On 26/05/2025 17:08, Christophe Lyon wrote:
> > This effective target implicitly expects -march=armv8-a, otherwise
> > with a toolchain configured for instance with
> > --with-cpu=cortex-m0 --with-float=soft,
> > it fails even when trying
>
On Fri, 8 Aug 2025 at 17:04, Richard Earnshaw wrote:
>
> On 04/07/2025 23:00, Christophe Lyon wrote:
> > Like we do in other effective-targets, add
> > "-mcpu=unset -march=armv8-a"
> > directly when setting et_arm_v8_neon_flags in arm_v8_neon_ok_nocache,
> > to avoid having to add these two flags
On Tue, Aug 05, 2025 at 02:54:01PM -0700, Jason Merrill wrote:
> On 8/4/25 4:53 PM, Marek Polacek wrote:
> > > > Now that even dummy lambdas have an operator(), I had to tweak
> > > > resolvable_dummy_lambda to give the right answer. This I did by
> > > > checking DECL_LAMBDA_FUNCTION_P which isn'
OK for:
writes:
> gcc/cgraph.cc | 4 +-
> gcc/cgraph.h | 2 +
> gcc/cgraphunit.cc | 9 +
> gcc/config/aarch64/aarch64.cc | 43 ++--
> gcc/ipa.cc
On 04/07/2025 23:00, Christophe Lyon wrote:
Like we do in other effective-targets, add
"-mcpu=unset -march=armv8-a"
directly when setting et_arm_v8_neon_flags in arm_v8_neon_ok_nocache,
to avoid having to add these two flags in all users of arm_v8_neon_ok.
This avoids duplication and possible ty
On 04/07/2025 23:00, Christophe Lyon wrote:
A few arm effective-targets call check_effective_target_arm32 even
though they would force a -march=XXX flag which supports Arm and/or
Thumb-2, thus making the arm32 check useless. This has an impact when
the toolchain is configured with a default -mar
Fix the bound checking for the opc1 operand of the following intrinsics:
__arm_mcrr
__arm_mcrr2
__arm_mrrc
__arm_mrrc2
Built arm-none-linux-gnueabihf and ran full regression test, and built
arm-none-eabi but only ran the changed tests on that config.
OK for trunk and backport to all op
On 26/05/2025 17:08, Christophe Lyon wrote:
This effective target implicitly expects -march=armv8-a, otherwise
with a toolchain configured for instance with
--with-cpu=cortex-m0 --with-float=soft,
it fails even when trying
-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp:
arm_neon.h:45:2: error: #er
On 11/07/2025 09:46, Torbjörn SVENSSON wrote:
Ok for trunk, gcc-15 and gcc-14.
I discovered that the dg-require-effective-target is missing on gcc-14,
but it's probably the right thing to add on gcc-15 and trunk too.
Without the `dg-require-effective-target vect_early_break`, the
`dg-add-option
On 09/07/2025 19:55, Torbjorn SVENSSON wrote:
Hi Christophe,
On 2025-07-09 17:31, Christophe Lyon wrote:
On Wed, 9 Jul 2025 at 10:25, Torbjörn SVENSSON
wrote:
Ok for trunk and releases/gcc-15?
Changes since v1:
- Removed the acceptance of LDR as it's only generated without
r15-7373-g5163cf
On 08/07/2025 16:14, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-15?
--
The scheduler allows the `and` instruction to be placed at 3 different
locations. Update the function body to contain all 3 locations.
Also, armv8.1-m.main can use `ldr` instead of `pop` to return.
gcc/testsuite
From: Richard Sandiford
SME uses a lazy save system to manage ZA. The idea is that,
if a function with ZA state wants to call a "normal" function,
it can leave its state in ZA and instead set up a lazy save buffer.
If, unexpectedly, that normal function contains a nested use of ZA,
that nested u
Backport of
https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=b5ffc8e75a81bab7ee7554483447c27be438464e
Regression tested on aarch64 and no regressions have been found.
New SME tests checked on the FVP model as described in [1].
OK for backport to gcc-15?
[1]: https://inbox.sourceware.org/libc-h
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
Alternatively, if preferred I also experimented with a patch that
cached the property as a TYPE_LANG_FLAG for ENUMERAL_TYPEs, which
was possibly slightly neater at the cost of using up a flag bit.
I've attached this alternative patch
Christophe Lyon writes:
> In commit r15-4417-g71c7b446b98aa5, I made -werror mandatory when
> building libgcc for aarch64.
>
> While it achieved its goal (make us fix problems unnoticed so far),
> there has a been a lot of debate because it couldn't be disabled
> easily.
As discussed off-list: yo
Joseph,
Thanks a lot for your review on patch #1 and #4.
Could you also take another look at patch #3: Use the counted_by attribute of
pointers in array bound checker?
You have reviewed and approved the previous version, in this new version, the
only difference compared
with the previous one
On 10/07/2025 15:08, Christophe Lyon wrote:
As discussed in https://gcc.gnu.org/pipermail/gcc-patches/2025-June/685733.html
the operand of the call should be a mem rather than an unspec.
This patch moves the unspec to an additional argument of the parallel
and adjusts cmse_nonsecure_call_inline_
On 04/07/2025 23:04, Christophe Lyon wrote:
We get lots of error messages when compiling arm_neon.h under
e.g. -mcpu=cortex-m55, because Neon builtins are enabled only when
!TARGET_HAVE_MVE. This has been the case since MVE support was
introduced.
This patch uses an approach similar to what we
In commit r15-4417-g71c7b446b98aa5, I made -werror mandatory when
building libgcc for aarch64.
While it achieved its goal (make us fix problems unnoticed so far),
there has a been a lot of debate because it couldn't be disabled
easily.
This patch adds support for --enable-werror/--disable-werror
> On 8 Aug 2025, at 14:23, Tamar Christina wrote:
>
>> -Original Message-
>> From: Pengfei Li
>> Sent: Friday, August 8, 2025 11:00 AM
>> To: Kyrylo Tkachov
>> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford ;
>> Tamar Christina
>> Subject: [PATCH v2] AArch64: Fix invalid immediate of
Hi,
Just realized I forgot to overload `get_name` for `local` so here is
the patch with the improved version.
Cordially.
Le ven. 18 juil. 2025 à 16:38, Guillaume Gomez
a écrit :
>
> Hi,
>
> Sorry for the very long delay (more than one year O.o).
>
> I finally took time to apply suggestions and
On Fri, Aug 08, 2025 at 02:11:43PM +0200, Richard Biener wrote:
> Currently they are grouped under Addressing Modes which is quite misleading.
>
> Built on x86_64-linux, I've inspected the generated pdf.
>
> OK?
>
> Thanks,
> Richard.
>
> gcc/
> * doc/tm.texi.in: Add Vectorization and Ope
> -Original Message-
> From: Pengfei Li
> Sent: Friday, August 8, 2025 11:00 AM
> To: Kyrylo Tkachov
> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford ;
> Tamar Christina
> Subject: [PATCH v2] AArch64: Fix invalid immediate offsets in SVE
> gather/scatter
> [PR121449]
>
> Below v2 patch
libstdc++-v3/ChangeLog:
* include/std/expected:
* testsuite/20_util/expected/lwg4222.cc: New test.
Signed-off-by: Yihan Wang
---
libstdc++-v3/include/std/expected | 1 +
.../testsuite/20_util/expected/lwg4222.cc | 15 +++
2 files changed, 16
Currently they are grouped under Addressing Modes which is quite misleading.
Built on x86_64-linux, I've inspected the generated pdf.
OK?
Thanks,
Richard.
gcc/
* doc/tm.texi.in: Add Vectorization and OpenMP and OpenACC
sub-sections to the list of target macros and functions.
> -Original Message-
> From: Richard Sandiford
> Sent: Friday, August 8, 2025 11:40 AM
> To: Richard Henderson
> Cc: gcc-patches@gcc.gnu.org; Karl Meakin ;
> pins...@gmail.com; Wilco Dijkstra ; Tamar Christina
>
> Subject: Re: [PATCH v2 05/13] aarch64: Fix gcs save/restore_stack_nonlocal
Richard Henderson writes:
> Reject QI/HImode conditions, which would require extension in
> order to compare. Fixes
>
> z.c:10:1: error: unrecognizable insn:
>10 | }
> | ^
> (insn 23 22 24 2 (set (reg:CC 66 cc)
> (compare:CC (reg:HI 128)
> (reg:HI 127))) "z.c":6:6 -1
Richard Henderson writes:
> Version 1 regressed the expansion of atomics, which means the addition
> of CC clobber to all conditional branches is flawed. Version 2 goes
> the other way: remove CC clobber from all conditional branches.
>
> This requires the out-of-range TBZ->TST+B.cond expansion b
Richard Henderson writes:
> Restrict the immediate range to the intersection of LT/GE and GT/LE
> so that cfglayout can invert the condition to redirect any branch.
>
> gcc:
> * config/aarch64/aarch64.cc (aarch64_cb_rhs): Restrict the
> range of LT/GE and GT/LE to their intersections.
On 05/08/2025 09:06, Kyrylo Tkachov wrote:
>
>
> > On 5 Aug 2025, at 11:00, Alex Coplan wrote:
> >
> > Hi Kyrill,
> >
> > Sorry for the slow reply, I was away on holiday until yesterday.
> >
> > On 15/07/2025 13:08, Kyrylo Tkachov wrote:
> >> Hi Alex,
> >>
> >>> On 15 Jul 2025, at 14:59, Ale
Richard Henderson writes:
> The enable for the test was wrong, so it never ran.
>
> gcc/testsuite:
> * gcc.target/aarch64/cmpbr.c: Use dg-require-effective-target.
> ---
> gcc/testsuite/gcc.target/aarch64/cmpbr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/t
Richard Henderson writes:
> The save/restore_stack_nonlocal patterns passed a DImode rtx
> to gen_tbranch_neqi3 for a QImode compare. The tbranch expander
> did not do what it said on the tin, that is: emit TBNZ.
> It only made it as far as AND+CMP+B.cond.
Yeah, that was done to allow ifcombine
On Wed, Aug 6, 2025 at 7:04 AM Edwin Lu wrote:
>
> This patch tries to add support for a variant of SAT_TRUNC where
> negative numbers are clipped to 0 instead of NARROW_TYPE_MAX_VALUE.
> This form is seen in x264, aka
>
> UT clip (T a)
> {
> return a & (UT)(-1) ? (-a) >> 31 : a;
the patch belo
Below v2 patch just updates the commit message in v1.
Please let me know if it's good enough now.
Thanks,
Pengfei
-- >8 --
This patch fixes incorrect constraints in RTL patterns for AArch64 SVE
gather/scatter with type widening/narrowing and vector-plus-immediate
addressing. The bug leads to bel
The following removes early setting of STMT_VINFO_VECTYPE and as
side-effect early failing if we fail to compute a vector type. The
latter is now ensured by SLP build. The former is still temporarily
copied from the SLP tree during stmt analysis, and data reference
stmts will still have STMT_VINF
In g:965564eafb721f813a3112f1bba8d8fae32b I'd added code
to try distributing non-widening subregs through logic ops,
in cases where that would eliminate a term of the logic op.
For "reasons", this indirectly caused combine to generate:
(set (zero_extract:SI (reg/v:SI 101 [ a ])
(c
On Fri, Aug 8, 2025 at 10:13 AM Stefan Schulze Frielinghaus
wrote:
>
> From: Stefan Schulze Frielinghaus
>
> In case an asm operand is an error node, constraints etc. are still
> validated. Furthermore, all other operands are gimplified, although an
> error is returned in the end anyway. For ha
The following avoids building BIT_FIELD_REFs of reference trees
that are unexpected by nonoverlapping_refs_since_match_p and
while being there also those declared invalid by IL verification.
Bootstrapped on x86_64-unknown-linux-gnu with go enabled, testing
in progress.
PR tree-optimizatio
Hi H.J.,
> When GNU binutils is configured with --enable-targets=all on Linux,
> "ld -V" will report both elf_x86_64_sol2 and elf_i386_sol2 as supported
> emulations. But they should only be used for Solaris 2 targets. Check
> for Solaris 2 targets before using sol2 linker emulations.
please le
enum can't be used in #if.
For #if expression, identifiers that are not macros,
which are all considered to be the number zero.
This patch may fix https://sourceware.org/bugzilla/show_bug.cgi?id=32776.
gcc/ChangeLog:
* config/loongarch/loongarch-def.h (ABI_BASE_LP64D): New macro.
The GCC 15.2 release is done and the releases/gcc-15 branch is open
for regression and documentation fixes again.
Quality Data
Priority # Change from last report
--- ---
P1 - 1
P2 591- 5
P3
From: Stefan Schulze Frielinghaus
In case an asm operand is an error node, constraints etc. are still
validated. Furthermore, all other operands are gimplified, although an
error is returned in the end anyway. For hard register constraints an
operand is required in order to determine the mode f
enum can't be used in #if.
For #if expression, identifiers that are not macros,
which are all considered to be the number zero.
This patch may fix https://sourceware.org/bugzilla/show_bug.cgi?id=32776.
---
gcc/config/loongarch/loongarch-def.h | 10 --
1 file changed, 4 insertions(+), 6 de
Here is a patch which conforms to the style requirements.
On Thu, Aug 7, 2025 at 9:30 PM Ben Wu wrote:
>
> PR 120618
>
> gcc/cp/ChangeLog:
>
> * constraint.cc (tsubst_compound_requirement): Return NULL_TREE when
> t1
> is not a TEMPLATE_TYPE_PARM
> (tsubst_requires_expr):
On Thu, 7 Aug 2025, Jakub Jelinek wrote:
> Hi!
>
> My earlier r16-1886 PR120608 change incorrectly assumed that the
> finally_tmp.N vars introduced by eh pass will be only initialized
> to values 0 and 1 and there will be only EQ_EXPR/NE_EXPR comparisons
> of those.
>
> The following testcases s
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