From: Stefan Schulze Frielinghaus
In commit r16-2316-gc6676092318 mistakenly patterns were introduced
which actually should have been merged as alternatives to existing zero
extend patterns.
While on it, generalize the vec_extract patterns and also allow
registers for the index. A subsequent pa
On Thu, Aug 14, 2025 at 6:58 AM H.J. Lu wrote:
>
> Add target("80387") attribute to enable and disable x87 instructions in a
> function.
>
> gcc/
>
> PR target/121541
> * config/i386/i386-options.cc
> (ix86_valid_target_attribute_inner_p): Add a bool argument to
> r
> Am 13.08.2025 um 19:04 schrieb Andrew Pinski :
>
> https://gcc.gnu.org/pipermail/gcc-patches/2025-August/692091.html
> pointed out:
> '''
> Oh, as we now do alias walks in forwprop maybe we should make this
> conditional and do
> this not for all pass instances, since it makes forwprop possi
> Am 13.08.2025 um 19:05 schrieb Andrew Pinski :
>
> From: Andrew Pinski
>
> This implements the simple copy prop of aggregates into
> arguments of function calls. This can reduce the number of copies
> done. Just like removing of an extra copy in general, this can and
> will help out SRA; s
On Wed, Aug 13, 2025 at 07:15:37PM +0200, Christophe Lyon wrote:
> Hi Stefan,
>
> On Tue, 12 Aug 2025 at 13:38, Stefan Schulze Frielinghaus
> wrote:
> >
> > From: Stefan Schulze Frielinghaus
> >
> > This test is about register pairs. On arm a long long is accepted in
> > thumb mode in any regis
Here we are placing constant values that have relocations into mergeable
sections,
many linkers don't support handling of that merging that section so they ignore
the
mergeability bit at that point. So instead just place them into the normal
readonly section.
Note categorize_decl_for_section wil
Hi all,
Below is a draft of the patch for PR119702. I request you to
please review it.
In vector extensions for rs6000, there is no immediate version
of left shift. This leads to having 2 instructions for the simple
case of left shift by one.
vspltisw 0,1
vsld 2,2,0
This could ha
Add target("80387") attribute to enable and disable x87 instructions in a
function.
gcc/
PR target/121541
* config/i386/i386-options.cc
(ix86_valid_target_attribute_inner_p): Add a bool argument to
return if x87 is disabled by target("no-80387") attribute. Add
Hello Jeff,
thanks for your comment.
- Am 10. Jul 2025 um 16:01 schrieb Jeff Law jeffreya...@gmail.com:
> On 7/9/25 11:53 PM, Sebastian Huber wrote:
>> There are targets, which only offer 32-bit atomic operations (for
>> example 32-bit RISC-V). For these targets, split the 64-bit atomic
>>
On Wed, Aug 13, 2025 at 6:47 PM Hongtao Liu wrote:
>
> On Thu, Aug 14, 2025 at 9:22 AM H.J. Lu wrote:
> >
> > commit 9804b23198b39f85a7258be556c5e8aed44b9efc
> > Author: H.J. Lu
> > Date: Sun Apr 13 11:38:24 2025 -0700
> >
> > x86: Add preserve_none and update no_caller_saved_registers att
> -Original Message-
> From: H.J. Lu
> Sent: Thursday, August 14, 2025 10:29 AM
> To: gcc-patches@gcc.gnu.org
> Cc: ubiz...@gmail.com; Liu, Hongtao
> Subject: [PATCH v2] x86: Disallow MMX and 80387 in
> no_caller_saved_registers function
>
> commit 9804b23198b39f85a7258be556c5e8aed44b
commit 9804b23198b39f85a7258be556c5e8aed44b9efc
Author: H.J. Lu
Date: Sun Apr 13 11:38:24 2025 -0700
x86: Add preserve_none and update no_caller_saved_registers attributes
allowed MMX/80387 instructions in functions with no_caller_saved_registers
attribute by accident. Update ix86_set_cur
- Am 10. Jul 2025 um 8:54 schrieb Sebastian Huber
sebastian.hu...@embedded-brains.de:
> If the target does not support the atomic_flag_test_and_set() operation in
> hardware, the compiler emits a call to __atomic_test_and_set(). However,
> libatomic provided only __atomic_test_and_set_1().
On Thu, Aug 14, 2025 at 9:22 AM H.J. Lu wrote:
>
> commit 9804b23198b39f85a7258be556c5e8aed44b9efc
> Author: H.J. Lu
> Date: Sun Apr 13 11:38:24 2025 -0700
>
> x86: Add preserve_none and update no_caller_saved_registers attributes
>
> allowed MMX/80387 instructions in functions with no_call
commit 9804b23198b39f85a7258be556c5e8aed44b9efc
Author: H.J. Lu
Date: Sun Apr 13 11:38:24 2025 -0700
x86: Add preserve_none and update no_caller_saved_registers attributes
allowed MMX/80387 instructions in functions with no_caller_saved_registers
attribute by accident. Update ix86_set_cur
Change in v7:
* Fix clang's local consteval floor().
Changes in v6:
* Implement also for Clang, using local consteval substitutes for its
non-constexpr __builtin_pow and __builtin_floor.
* Add a test for long double.
Changes in v5:
* Static-assert movable RNG object correctly.
* Add a mor
On 8/13/25 1:26 PM, Jakub Jelinek wrote:
Hi!
The following testcase is miscompiled since my r15-3046 change
to properly apply std attributes after closing ] for arrays to the
array type.
Array type is not a class type, so when cplus_decl_attribute is
called on the ARRAY_TYPE, it doesn't do ATTR_
Changes in v6:
* Implement also for Clang, using local consteval substitutes for its
non-constexpr __builtin_pow and __builtin_floor.
* Add a test for long double.
Changes in v5:
* Static-assert movable RNG object correctly.
* Add a more comprehensive test gencanon.cc
Changes in v4:
* Stat
Public
>> Public
>>
>> Hi,
>>
>>> I was going to apply this patch as it seems reasonable and independent
>>> of everything else. But unfortunately it appears that you have munged
>>> tabs into spaces.
>>>
>>> While we could potentially use "-l" to ignore that problem and allow the
>>> patch to ap
From: Pan Li
This patch would like to try to match the the unsigned
SAT_MUL form 3, aka below:
#define DEF_SAT_U_MUL_FMT_3(NT, WT) \
NT __attribute__((noinline))\
sat_u_mul_##NT##_from_##WT##_fmt_3 (NT a, NT b) \
{
From: Pan Li
Add run and asm check test cases for scalar unsigned SAT_MUL form 3.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_mul-4-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-4-u16-fro
From: Pan Li
This patch would like to try to match the the unsigned
SAT_MUL form 3, aka below:
#define DEF_SAT_U_MUL_FMT_3(NT, WT) \
NT __attribute__((noinline))\
sat_u_mul_##NT##_from_##WT##_fmt_3 (NT a, NT b) \
{
No functional change intended.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r16-3194-g1da90c533f9446.
gcc/ChangeLog:
* diagnostics/output-spec.cc (sarif_scheme_handler::make_sink):
Populate sarif_generation_options instance directly, rather tha
On Wed, Aug 13, 2025 at 1:27 PM Jeff Law wrote:
>
>
> On 8/13/25 12:35 PM, Andrew Pinski wrote:
> > From: Andrew Pinski
> >
> > rl78 still uses reload rather than LRA.
> > epiphany still uses reload and causes ICEs during reload.
> >
> > Both don't have a maintainer. epiphany has been without on
Hi!
The following testcase is miscompiled since my r15-3046 change
to properly apply std attributes after closing ] for arrays to the
array type.
Array type is not a class type, so when cplus_decl_attribute is
called on the ARRAY_TYPE, it doesn't do ATTR_FLAG_TYPE_IN_PLACE.
Though, for alignas/gnu
Hi!
This patch fixes a comment typo, whaever -> whatever, prompted by the
recent hae -> has typo fix.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk
as obvious.
2025-08-13 Jakub Jelinek
* cp-demangle.c (d_encoding): Fix a comment typo, whaever -> whatever.
On 8/13/25 12:35 PM, Andrew Pinski wrote:
From: Andrew Pinski
rl78 still uses reload rather than LRA.
epiphany still uses reload and causes ICEs during reload.
Both don't have a maintainer. epiphany has been without one since
2024 (2023 email) while rl78 has been without one since 2018.
gc
On 8/11/25 11:03, Tobias Burnus wrote:
[snip]
As you are adding comments, I think you also need to add one for
the 'not construct={simd}'.
That those are skipped is part of commit r10-3744-g94e7f906ca5c73,
i.e. pretty old.
I bet is has something to do with the modifications done via
c_omp_decl
The 08/07/2025 15:44, Richard Sandiford wrote:
> writes:
> > From: Alfie Richards
> >
> > This patch introduces the TARGET_CHECK_TARGET_CLONE_VERSION hook
> > which is used to determine if a target_clones version string parses.
> >
> > The hook has a flag to enable emitting diagnostics.
> >
> > T
So the usual problems, DFAs without full coverage. I took the output of
Kito's checker and use that to construct a dummy reservation for the
p400 and p600 sifive models.
Tested on riscv32-elf and riscv64-elf with no regressions.
Pushing to the trunk once pre-commit CI gives the green light.
On Wed, 13 Aug 2025, Patrick Palka wrote:
> Thanks for the patch! Looks good to me for the most part.
>
> On Fri, 8 Aug 2025, Yihan Wang wrote:
>
> > libstdc++-v3/ChangeLog:
> >
> > * include/std/expected:
>
> This ChangeLog entry should be filled in, e.g.
>
> * include/std/expecte
Thanks for the patch! Looks good to me for the most part.
On Fri, 8 Aug 2025, Yihan Wang wrote:
> libstdc++-v3/ChangeLog:
>
> * include/std/expected:
This ChangeLog entry should be filled in, e.g.
* include/std/expected (expected::expected(_Up&&)): Add
missing constraint
On Wed, Aug 13, 2025 at 3:44 PM H.J. Lu wrote:
>
> On Mon, Jul 28, 2025 at 1:29 AM Uros Bizjak wrote:
> >
> > On Sat, Jul 26, 2025 at 7:37 PM H.J. Lu wrote:
> > >
> > > __tls_get_addr doesn't preserve vector registers. When a function
> > > with no_caller_saved_registers attribute calls __tls_g
Tested on x86_64, i686 Darwin, pushed to trunk, thanks
Iain
--- 8< ---
Newer linker support an option to disable deduplication of entities.
This speeds up linking and can improve debug experience. Adopting the
same criteria as clang in adding the option.
Signed-off-by: Iain Sandoe
gcc/ChangeL
> Am 13.08.2025 um 20:36 schrieb Andrew Pinski :
>
> From: Andrew Pinski
>
> rl78 still uses reload rather than LRA.
> epiphany still uses reload and causes ICEs during reload.
>
> Both don't have a maintainer. epiphany has been without one since
> 2024 (2023 email) while rl78 has been with
A follow-up from "driver: Rework for_each_path using C++"
These types are, for all intents and purposes, single-use closure
environment types. It is much more ergonomic to juse use lambdas for
this.
On IRC there was concern about static dispatch and compile times with
lambdas, but I have kept the
The 08/08/2025 17:44, Richard Sandiford wrote:
> writes:
> > From: Alfie Richards
> >
> > Adds an optimisation in FMV to redirect to a specific target if possible.
> >
> > A call is redirected to a specific target if both:
> > - the caller can always call the callee version
> > - and, it is possi
From: Andrew Pinski
rl78 still uses reload rather than LRA.
epiphany still uses reload and causes ICEs during reload.
Both don't have a maintainer. epiphany has been without one since
2024 (2023 email) while rl78 has been without one since 2018.
gcc/ChangeLog:
* config.gcc: Mark epipha
Thank you. I missed that, somehow.
> -Original Message-
> From: Mark Wielaard
> Sent: Wednesday, August 13, 2025 11:57
> To: gcc-patches@gcc.gnu.org
> Cc: Robert Dubner ; Mark Wielaard
> Subject: [COMMITTED] Regenerate libgcobol/configure
>
> Use autoconf 2.69 to regenerate libgcobol/co
On Wed, 13 Aug 2025, Iain Sandoe wrote:
> Hi Patrick,
>
> > On 13 Aug 2025, at 16:26, Patrick Palka wrote:
> >
> > On Sun, 10 Aug 2025, Jason Merrill wrote:
> >
> >> On 8/8/25 1:27 PM, Patrick Palka wrote:
> >>> Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK
> >>> for tru
Tested on x86_64, i686 darwin, pushed to trunk, thanks
Iain
--- 8< ---
The Darwin ABI uses a different section for string constants when
address sanitizing is enabled. This adds defintions of the asan-
specific sections and switches string constants to the correct
section.
It also makes the str
Hi Stefan,
On Tue, 12 Aug 2025 at 13:38, Stefan Schulze Frielinghaus
wrote:
>
> From: Stefan Schulze Frielinghaus
>
> This test is about register pairs. On arm a long long is accepted in
> thumb mode in any register 0-6 whereas in arm mode this is restricted to
> even register pairs. Thus, in
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/692091.html
pointed out:
'''
Oh, as we now do alias walks in forwprop maybe we should make this
conditional and do
this not for all pass instances, since it makes forwprop possibly a lot slower?
'''
This does patch limits the walk in a few diff
From: Andrew Pinski
This implements the simple copy prop of aggregates into
arguments of function calls. This can reduce the number of copies
done. Just like removing of an extra copy in general, this can and
will help out SRA; since we might not need to do a full scalarization
of the aggregate n
On Wed, Aug 13, 2025 at 10:37:35AM -0400, Jason Merrill wrote:
> It looks to me like we're supposed to complain whether or not they're
> defined.
Ok, here is a new version.
For __cpp_* macros which aren't defined solely based on cxx_dialect >= cxxXX
but instead being guarded on various switches as
Hi Joseph,
Thank you for the feedback.
You're absolutely right — the --with-multi-buildlist option introduces a
user-visible, target-independent feature, and it deserves to be reviewed
and documented separately from the MIPS-specific changes.
I prepared a revised patch that:
- Introduces only t
This is the first step in handling the review part of:
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/692091.html
'''
Oh, as we now do alias walks in forwprop maybe we should make this
conditional and do
this not for all pass instances, since it makes forwprop possibly a lot slower?
'''
The
From: Aleksandar Rakic
This patch applies the previously introduced --with-multi-buildlist
mechanism to the MIPS target.
It replaces legacy multilib configuration files (e.g. t-img-linux,
t-mti-linux) with a unified t-mips-multi file that describes all
possible MIPS multilib variants. The actual
From: Aleksandar Rakic
Aleksandar Rakic (2):
Add --with-multi-buildlist configure option
MIPS: Add support for --with-multi-buildlist
config-ml.in | 26 ++-
configure| 25 +++
configure.ac | 25 +++
gcc/Makefile.in | 20 ++
From: Aleksandar Rakic
This patch introduces a new configure-time option --with-multi-buildlist
to allow fine-grained control over which multilib variants are built.
The option accepts a path to a file containing a list of multilib
directories to be included in the build. Each line in the file
Hi Patrick,
> On 13 Aug 2025, at 16:26, Patrick Palka wrote:
>
> On Sun, 10 Aug 2025, Jason Merrill wrote:
>
>> On 8/8/25 1:27 PM, Patrick Palka wrote:
>>> Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK
>>> for trunk?
>>>
>>> -- >8 --
>>>
>>> At some point these flag sta
On Tue, Aug 12, 2025 at 6:11 PM H.J. Lu wrote:
>
> On Tue, Aug 12, 2025 at 4:19 PM Jason Merrill wrote:
> >
> > On 8/1/25 4:56 AM, H.J. Lu wrote:
> > > Set a tentative TLS model in grokvardecl and update DECL_TLS_MODEL with
> > > the default TLS access model after a TLS variable has been fully pr
Use autoconf 2.69 to regenerate libgcobol/configure
Fixes: 9992c0a0e1b4 ("cobol: Bring EBCDIC NumericDisplay variables into IBM
compliance.")
libgcobol/ChangeLog:
* configure: Regenerate.
---
libgcobol/configure | 1 +
1 file changed, 1 insertion(+)
diff --git a/libgcobol/configure b/
Set a tentative TLS model in grokvardecl and update DECL_TLS_MODEL with
the default TLS access model after a TLS variable has been fully processed
if the default TLS access model is stronger.
gcc/cp/
PR c++/107393
* decl.cc (grokvardecl): Add a pointer to bool argument to
Both C and C++ front ends should set a tentative TLS model in grokvardecl
and update DECL_TLS_MODEL with the default TLS access model after a TLS
variable has been fully processed if the default TLS access model is
stronger.
PR c/107419
PR c++/107393
* c-c++-common/tls-attr
On 8/12/25 8:04 AM, Marek Polacek wrote:
On Sun, Aug 10, 2025 at 02:20:22PM -0700, Jason Merrill wrote:
On 8/8/25 11:37 AM, Marek Polacek wrote:
On Tue, Aug 05, 2025 at 02:54:01PM -0700, Jason Merrill wrote:
On 8/4/25 4:53 PM, Marek Polacek wrote:
Now that even dummy lambdas have an operator(
The old C-style was cumbersome make making one responsible for manually
create and pass a closure (separate function and *_info class for
closed-over variables).
I would have liked to redo this with C++ lambdas, so we could:
- derive environment types implicitly
- have fewer stray static function
From: Robert Dubner
Date: Wed, 13 Aug 2025 11:17:05 -0400
Subject: [PATCH] cobol: Implement and use faster __gg__packed_to_binary()
routine.
The new routine uses table lookups more effectively, and avoids __int128
arithmetic until necessary.
gcc/cobol/ChangeLog:
* genutil.cc (get_binar
Wilco Dijkstra writes:
> Add an expander for isinf using integer arithmetic. This is
> typically faster and avoids generating spurious exceptions on
> signaling NaNs.
>
> int isinf1 (float x) { return __builtin_isinf (x); }
>
> Before:
> fabss0, s0
> mov w0, 2139095039
>
Add an expander for isinf using integer arithmetic. This is
typically faster and avoids generating spurious exceptions on
signaling NaNs.
int isinf1 (float x) { return __builtin_isinf (x); }
Before:
fabss0, s0
mov w0, 2139095039
fmovs31, w0
fcmps
On Sun, 10 Aug 2025, Jason Merrill wrote:
> On 8/8/25 1:27 PM, Patrick Palka wrote:
> > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK
> > for trunk?
> >
> > -- >8 --
> >
> > At some point these flag start getting defined in terms of the previous
> > flag, which is inconven
Claudiu Zissulescu-Ianculescu writes:
>>> + [(set (match_operand:TI 0 "aarch64_granule16_memory_operand" "=Umg")
>>> + (unspec:TI
>>> +[(match_operand:TI 1 "aarch64_granule16_memory_operand" "Umg")
>>> + (match_operand:DI 2 "register_operand" "rk")]
>>> +UNSPEC_TAG_SP
Hi Andrew,
> Note the bug report for the missing optab documentation is PR 101852;
> Some the script I added there; missed isinf.
Sure, I've added the PR so it gets updated.
Cheers,
Wilco
v2: Add PR for missing doc entry
Add an optab for isnan. This requires changes to the existing folding c
On 7/16/25 6:02 PM, Benjamin Wu wrote:
Fixes typo in lex.cc. Could someone help commit?
Done, thanks.
gcc/cp/ChangeLog:
* lex.cc (init_operators): Fix typo.
---
gcc/cp/lex.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/cp/lex.cc b/gcc/cp/lex.cc
index 08a
On 8/2/25 12:33 AM, Jakub Jelinek wrote:
Hi!
We already warn on #undef or pedwarn on #define (but not on #define after
#undef) of some builtin macros mentioned in cpp.predefined.
The C++26 P2843R3 paper changes it from (compile time) undefined behavior
to ill-formed. The following patch arrang
>> +/* Implement TARGET_MEMTAG_ADD_TAG. */
>> +rtx
>> +aarch64_memtag_add_tag (rtx base, poly_int64 offset, uint8_t tag_offset)
>> +{
>> + rtx target = NULL;
>> + poly_int64 addr_offset = offset;
>> + rtx offset_rtx = gen_int_mode (addr_offset, DImode);
>
> This should only be done for the non
Hi Jeevitha,
On 02/07/25 11:50 am, jeevitha wrote:
> Hi All,
>
> The following patch has been bootstrapped and regtested on powerpc64le-linux.
>
> Changes from V3:
> * Replaced named operands with positional operands in inline assembly for
> better readability.
> * Considered using _ADDR[0] and
On Wed, 2025-08-13 at 11:24 +0200, Richard Biener wrote:
> On Wed, Jul 30, 2025 at 4:42 PM Qing Zhao wrote:
[...snip...]
>
> >
> >
> > diff --git a/gcc/diagnostic-context-rich-location.h
> > b/gcc/diagnostic-context-rich-location.h
> > new file mode 100644
> > index 000..676b9d23b05
writes:
> From: Soumya AR
>
> Hi,
>
> This RFC is a continuation of previous patches sent here:
> https://gcc.gnu.org/pipermail/gcc-patches/2025-May/682702.html
>
> As suggested in the earlier thread, I've now added a python script to generete
> the printing and parsing routines for the JSON tuni
On Mon, Jul 28, 2025 at 1:29 AM Uros Bizjak wrote:
>
> On Sat, Jul 26, 2025 at 7:37 PM H.J. Lu wrote:
> >
> > __tls_get_addr doesn't preserve vector registers. When a function
> > with no_caller_saved_registers attribute calls __tls_get_addr, YMM
> > and ZMM registers will be clobbered. Issue a
claudiu.zissulescu-iancule...@oracle.com writes:
> [...]
> /* Implement TARGET_MEMTAG_CAN_TAG_ADDRESSES. Here we tell the rest of the
> compiler that we automatically ignore the top byte of our pointers, which
> - allows using -fsanitize=hwaddress. */
> + allows using -fsanitize=hwaddres
Hi!
My r16-3059 PR120778 change which introduced the -Wkeyword-macro option
and made it a default for C++26 -pedantic broke quite a few tests on
powerpc*. The problem is that the backend predefines bool and _Bool as
macros (unclear why _Bool for C++ because in C++ _Bool is not a keyword)
to make
On Wed, Aug 13, 2025 at 12:35 AM Hongtao Liu wrote:
>
> On Wed, Aug 13, 2025 at 2:35 PM Hongtao Liu wrote:
> >
> > On Tue, Aug 12, 2025 at 10:02 PM H.J. Lu wrote:
> > >
> > > On Tue, Aug 12, 2025 at 06:47:54AM -0700, H.J. Lu wrote:
> > > > On Mon, Aug 11, 2025 at 11:13 PM Hongtao Liu wrote:
> >
The following wraps SLP_TREE_CODE checks against VEC_PERM_EXPR
(the only relevant code) in a new SLP_TREE_PERMUTE_P predicate.
Most places guard against SLP_TREE_REPRESENTATIVE being NULL.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vectorizer.h (SLP_TREE_PERMUTE_P
When we canonicalize the comparison for a czero sequence we need to
handle both integer and fp comparisons. Furthermore, within the integer
space we want to make sure we promote any sub-word objects to a full word.
All that is working fine. After promotion we then force the value into
a regi
This removes a use of STMT_VINFO_DEF_TYPE.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vect-stmts.cc (vect_analyze_stmt): Use
SLP_TREE_DEF_TYPE instead of STMT_VINFO_DEF_TYPE.
---
gcc/tree-vect-stmts.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
claudiu.zissulescu-iancule...@oracle.com writes:
> From: Indu Bhagat
>
> Define new constants to be used by the MTE pattern definitions.
>
> gcc/
>
> * config/aarch64/aarch64.md (MEMTAG_TAG_MASK): New define
> constant.
> (MEMTAG_ADDR_MASK): Likewise.
> (irg, subp, ldg): Us
claudiu.zissulescu-iancule...@oracle.com writes:
> From: Claudiu Zissulescu
>
> Add a new target instruction. Hardware-assisted sanitizers on
> architectures providing insstructions to tag/untag memory can then
> make use of this new instruction pattern. For example, the
> memtag-stack sanitizer u
claudiu.zissulescu-iancule...@oracle.com writes:
> From: Indu Bhagat
>
> Currently, the data type of sanitizer flags is unsigned int, with
> SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual
> enumerator for enum sanitize_code. Use 'sanitize_code_type' data type
> to allow for more
Hi!
Here is an updated version of the
https://gcc.gnu.org/pipermail/libstdc++/2025-July/062597.html
patch, which removes the __throw_format_error forward declaration
which apparently wasn't needed for anything as all __throw_format_error
users were either in or included before the uses,
reverts
From: Indu Bhagat
Add basic tests for memtag-stack sanitizer. Memtag stack sanitizer
uses target hooks to emit AArch64 specific MTE instructions.
gcc/testsuite:
* lib/target-supports.exp:
* gcc.target/aarch64/memtag/alloca-1.c: New test.
* gcc.target/aarch64/memtag/allo
From: Claudiu Zissulescu
Memory tagging is used for detecting memory safety bugs. On AArch64, the
memory tagging extension (MTE) helps in reducing the overheads of memory
tagging:
- CPU: MTE instructions for efficiently tagging and untagging memory.
- Memory: New memory type, Normal Tagged Mem
From: Indu Bhagat
Add new command line option -fsanitize=memtag-stack with the following
new params:
--param memtag-instrument-alloca [0,1] (default 1) to use MTE insns
for enabling dynamic checking of stack allocas.
Along with the new SANITIZE_MEMTAG_STACK, define a SANITIZE_MEMTAG
which will b
From: Claudiu Zissulescu
MEMTAG sanitizer, which is based on the HWASAN sanitizer, will invoke
the target-specific hooks to create a random tag, add tag to memory
address, and finally tag and untag memory.
Implement the target hooks to emit MTE instructions if MEMTAG sanitizer
is in effect. Con
From: Indu Bhagat
Currently, the data type of sanitizer flags is unsigned int, with
SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual
enumerator for enum sanitize_code. Use 'sanitize_code_type' data type
to allow for more distinct instrumentation modes be added when needed.
gcc/Ch
From: Claudiu Zissulescu
Add a new target instruction. Hardware-assisted sanitizers on
architectures providing insstructions to tag/untag memory can then
make use of this new instruction pattern. For example, the
memtag-stack sanitizer uses these instructions to tag and untag a
memory granule.
g
From: Claudiu Zissulescu
Add a new target hook TARGET_MEMTAG_COMPOSE_OFFSET_TAG to perform
addition between two tags.
The default of this hook is to byte add the inputs.
Hardware-assisted sanitizers on architectures providing instructions
to compose (add) two tags like in the case of AArch64.
From: Indu Bhagat
gcc/Changelog:
* asan.h (HWASAN_TAG_SIZE): Use targetm.memtag.tag_bitsize.
* config/i386/i386.cc (ix86_memtag_tag_size): Rename to
ix86_memtag_tag_bitsize.
(TARGET_MEMTAG_TAG_SIZE): Renamed to TARGET_MEMTAG_TAG_BITSIZE.
* doc/tm.texi (TAR
From: Indu Bhagat
Define new constants to be used by the MTE pattern definitions.
gcc/
* config/aarch64/aarch64.md (MEMTAG_TAG_MASK): New define
constant.
(MEMTAG_ADDR_MASK): Likewise.
(irg, subp, ldg): Use new constants.
Signed-off-by: Claudiu Zissulescu
---
From: Claudiu Zissulescu
Hi,
Please find a new series of patches that implememnts stack sanitizer
using AArch64 MTE instructions.
The related binutils patches are upstream:
https://sourceware.org/pipermail/binutils/2025-July/142407.html
The glibc patches are under review:
https://sourceware.or
This is a partial implementation of P2781R8. It adds std::cw and
std::constant_wrapper, but doesn't modify __integral_constant_like for
span/mdspan.
libstdc++-v3/ChangeLog:
* include/bits/version.def (constant_wrapper): Add.
* include/bits/version.h: Regenerate.
* include/
> -Original Message-
> From: Yury Khrustalev
> Sent: Friday, August 8, 2025 2:53 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Sandiford ; Tamar Christina
> ; Andrew Pinski
> Subject: [PATCH 0/1] aarch64: Adapt unwinder to linux's SME signal behaviour
>
> Backport of
> https://gcc.gnu.o
On Wed, Jul 30, 2025 at 4:42 PM Qing Zhao wrote:
>
> Hi,
>
> This is the 8th version of the patches for fixing PR109071.
>
> Adding -fdiagnotics-show-context=N into GCC to provide context information
> to the end users on how the warnings come from, in order to help the user
> to locate the exact
Hi Kito & Jeff,
I'll fixed it as you mentioned in v4. Thanks.
Hi Palmer,
I'm not sure what wrong is for the spam filter.
I'll try to check my SMTP server. Thanks for your reminder.
Jeff Law 於 2025年8月13日 週三 下午12:22寫道：
>
>
>
> On 8/12/25 4:09 AM, Kito Cheng wrote:
> > This patchset LGTM except
On Wed, Aug 13, 2025 at 2:30 PM Hongtao Liu wrote:
>
> On Tue, Aug 5, 2025 at 8:49 AM Andi Kleen wrote:
> >
> > From: Andi Kleen
> >
> > The GFNI AVX gf2p8affineqb instruction can be used to implement
> > vectorized byte shifts or rotates. This patch uses them to implement
> > shift and rotate p
On Wed, Aug 13, 2025 at 12:06 AM Nathan Myers wrote:
> Changes in v5:
> * Static-assert movable RNG object correctly.
> * Add a more comprehensive test gencanon.cc
>
> Changes in v4:
> * Static-assert that arg is floating-point, coercible from bigger
> unsigned.
> * Static-assert that arg sat
On Wed, Aug 13, 2025 at 2:35 PM Hongtao Liu wrote:
>
> On Tue, Aug 12, 2025 at 10:02 PM H.J. Lu wrote:
> >
> > On Tue, Aug 12, 2025 at 06:47:54AM -0700, H.J. Lu wrote:
> > > On Mon, Aug 11, 2025 at 11:13 PM Hongtao Liu wrote:
> > > >
> > > > On Mon, Aug 4, 2025 at 11:33 PM H.J. Lu wrote:
> > >
The gather_scatter_info pointer is only used as flag, so pass down
a flag.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vectorizer.h (vect_supportable_dr_alignment): Pass
a bool instead of a pointer to gather_scatter_info.
* tree-vect-data-refs.cc (v
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