>
> I think for a 512-bit vector, vgf2p8affineqb is better than the
> original codegen, but for a 128/256-bit vector, shouldn't vpcmpgtb be
> better than vgf2p8affineqb?
Yes it's better, but I don't see it in the loop bodies for
any of my test cases, only in prologues/epilogues.
Okay probably t
Hi Jose,
Thank you for the edit permission.
I’ve updated the branch name in my repository to a clearer one and
also updated the wiki. I’ll continue making edits to add more details
about the tool.
Best regards,
Piyush
On Tue, 19 Aug 2025 at 23:01, Jose E. Marchesi wrote:
>
>
> > On 16/07/25 00
This patch adds new DejaGnu target board for BPF for runtime testing of
BPF programs using the `bpf-vmtest-tool` script in the contrib directory.
The kernel version used for the tests can be specified via KERNEL_VERSION,
for example:
make check-gcc RUNTESTFLAGS="--target_board=bpf bpf-torture.exp
This patch adds the bpf-vmtest-tool subdirectory under contrib which tests
BPF programs under a live kernel using a QEMU VM. It automatically
builds the specified kernel version with eBPF support enabled
and stores it under "~/.bpf-vmtest-tool", which is reused for future
invocations.
It can also
Hi,
This patch adds runtime support for BPF target tests.
Changes in contrib/bpf-vmtest-tool since the previous patch :
https://gcc.gnu.org/pipermail/gcc-patches/2025-July/688467.html
- Added a VMTEST_ prefix to environment variables used to customize the
host compiler. This avoids conflicts w
Dear reviewers,I attached a patch for bug 121595 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121595). I signed it, and added `Reviewed-by: Andrew Pinski ` (here in CC).Best regards,Matteo
tree-optimization-121595.patch
Description: Binary data
Compile noplt-gd-1.c and noplt-ld-1.c with -mtls-dialect=gnu to support
the --with-tls=gnu2 configure option since they scan the assembly output
for the __tls_get_addr call which is generated by -mtls-dialect=gnu.
PR target/120933
* gcc.target/i386/noplt-gd-1.c (dg-options): Add
On Fri, 22 Aug 2025, Nathaniel Shead wrote:
> Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?
>
> -- >8 --
>
> In the PR, we're getting a linker error from _Vector_impl's destructor
> never getting emitted. This is because of a combination of factors:
>
> 1. in imp-member-4_a,
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the German team of translators. The file is available at:
https://translationproject.org/latest/gcc/de.po
(This file, 'gcc-15.2.0.de.po', has jus
On 8/21/25 11:48 PM, Anton Blanchard wrote:
Add pipeline description for the Tenstorrent Ascalon 8 wide CPU.
gcc/ChangeLog:
* config/riscv/riscv-cores.def (RISCV_TUNE): Update.
* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
Add tt_ascalon_d8.
On Sat, Aug 23, 2025 at 1:34 AM Andi Kleen wrote:
>
> From: Andi Kleen
>
> [v3 version: Remove unnecessary _mask pattern.
> Add extra FAIL case. Remove unnecessary AVX512F check.
> Fix changelog.]
>
> [v2 version: Split rotate patterns in V16QI and V32/64QI.
> Add various AVX512F checks. Remove s
On Fri, Aug 22, 2025 at 11:26 PM Andi Kleen wrote:
>
> > > + else if (TARGET_GFNI && TARGET_AVX512F && CONST_INT_P (operands[2]))
> > I don't think we need AVX512F here, and let's exclude >>7 cases here,
> > so better be.
> > else if (TARGET_GFNI
> > && CONST_INT_P (operands[2])
> >
I can't believe I made such a stupid pasto and the regression test
didn't detect anything wrong.
PR target/121634
gcc/
* config/loongarch/simd.md (simd_maddw_evod__): Use
WVEC_HALF instead of WVEC for the mode of the sign_extend for
the rhs of multiplication.
gcc
Sam James writes:
> Allow passing --with-tls= at configure-time to control the default value
> of -mtls-dialect= for i386 and x86_64. The default itself (gnu) is not changed
> unless --with-tls= is passed.
>
> --with-tls= is already wired up for ARM and RISC-V.
>
> gcc/ChangeLog:
> PR targe
Jakub Jelinek writes:
> On Sun, Aug 10, 2025 at 11:46:53PM +0200, Gerald Pfeifer wrote:
>> On Mon, 4 Aug 2025, Sam James wrote:
>> > .. as we did for <= 10.
>> :
>> > GCC 11 Release Series
>> >
>> > +(This release series is no longer supported.)
>>
>> Is there some place where we ought to doc
Uros Bizjak writes:
> On Sat, Aug 23, 2025 at 11:13 AM Uros Bizjak wrote:
>>
>> On Sat, Aug 23, 2025 at 2:42 AM Sam James wrote:
>> >
>> > Allow passing --with-tls= at configure-time to control the default value
>> > of -mtls-dialect= for i386 and x86_64. The default itself (gnu) is not
>> > c
On Sat, Aug 23, 2025 at 11:13 AM Uros Bizjak wrote:
>
> On Sat, Aug 23, 2025 at 2:42 AM Sam James wrote:
> >
> > Allow passing --with-tls= at configure-time to control the default value
> > of -mtls-dialect= for i386 and x86_64. The default itself (gnu) is not
> > changed
> > unless --with-tls=
On Sat, Aug 23, 2025 at 2:42 AM Sam James wrote:
>
> Allow passing --with-tls= at configure-time to control the default value
> of -mtls-dialect= for i386 and x86_64. The default itself (gnu) is not changed
> unless --with-tls= is passed.
>
> --with-tls= is already wired up for ARM and RISC-V.
>
>
From: Pan Li
This patch would like to combine the vec_duplicate + vmacc.vv to the
vmacc.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR. Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if th
From: Pan Li
Add asm dump check and run test for vec_duplicate + vmacc.vvm
combine to vmacc.vx, with the GR2VR cost is 0, 2 and 15.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
for vx combine.
* gcc.target/riscv/rvv/autovec/vx_v
From: Pan Li
Add asm dump check and run test for vec_duplicate + vmacc.vvm
combine to vmacc.vx, with the GR2VR cost is 0, 2 and 15.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check
for vx combine.
* gcc.target/riscv/rvv/autovec/vx_v
From: Pan Li
This patch would like to introduce the combine of vec_dup + vmacc.vv
into vmacc.vx on the cost value of GR2VR. The late-combine will take
place if the cost of GR2VR is zero, or reject the combine if non-zero
like 1, 2, 15 in test.
From:
| ...
| vmv.v.x
| L1:
| vmacc.vv
|
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