Christophe Lyon writes:
> Hi Andrea,
>
> Minor comments below:
>
> On 4/28/23 13:29, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>> this patch fixes the vstrwq* MVE instrinsics failing to emit the
>> correct sequence of instruction due to a missing pre
Christophe Lyon writes:
> Hi Andrea,
>
> Minor comments below:
>
> On 4/28/23 13:29, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>> this patch fixes the vstrwq* MVE instrinsics failing to emit the
>> correct sequence of instruction due to a missing pre
From: Stam Markianos-Wright
These newly updated tests were rewritten by Andrea. Some of them
needed further manual fixing as follows:
* The #shift immediate value not in the check-function-bodies as expected
* Some shifts getting optimised to mov immediates, e.g.
`uqshll (1, 1);` -> movs
Hi all,
this patch fixes the vstrwq* MVE instrinsics failing to emit the
correct sequence of instruction due to a missing predicates. Also the
immediate range is fixed to be multiples of 2 up between [-252, 252].
Best Regards
Andrea
gcc/ChangeLog:
* config/arm/constraints.md
From: Stam Markianos-Wright
Hi all,
We noticed that calls to the vadcq and vsbcq intrinsics, both of
which use __builtin_arm_set_fpscr_nzcvqc to set the Carry flag in
the FPSCR, would produce the following code:
```
< r2 is the *carry input >
vmrsr3, FPSCR_nzcvqc
bic r3, r3, #536870912
From: Stam Markianos-Wright
Following Andrea's overhaul of the MVE testsuite, these tests are now
reduntant, as equivalent checks have been added to the each intrinsic's
.c test.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed.
*
From: Stam Markianos-Wright
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and
From: Stam Markianos-Wright
We found this as part of the wider testsuite updates.
The applicable tests are authored by Andrea earlier in this patch series
Ok for trunk?
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vorrq): Add _n variant.
---
gcc/config/arm/arm_mve.h | 10 +-
From: Stam Markianos-Wright
We found this as part of the wider testsuite updates.
The applicable tests are authored by Andrea earlier in this patch series
Ok for trunk?
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vbicq): Change coerce on
scalar constant.
Alexandre Oliva via Gcc-patches writes:
> The pr104882.c test is an execution test, but arm_v8_1m_mve_ok only
> tests for compile-time support. Add a requirement for mve hardware.
>
> Regstrapped on x86_64-linux-gnu.
> Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install?
>
>
Alexandre Oliva writes:
> Back in September last year, some of the vmsr and vmrs patterns had an
> extraneous blank removed, and the case of register names lowered, but
> another instance remained, and so did a few testcases.
[...]
Hi Alexandre,
I'm not approver but LGTM, thanks for fixing
Andrea Corallo writes:
> gcc/
>
> * config/arm/arm.cc (arm_valid_target_attribute_rec): Add ARM function
> attribute 'branch-protection' and parse its options.
> * doc/extend.texi: Document ARM Function attribute 'branch-protection'.
>
> gcc/testsuite/
>
> *
Richard Sandiford writes:
> Andrea Corallo via Gcc-patches writes:
>> Hi all,
>>
>> this is to fix the regression of
>> g++.target/aarch64/return_address_sign_ab_exception.C that I
>> introduced with d8dadbc9a5199bf7bac1ab7376b0f84f45e94350.
>>
>> '
Hi all,
this is to fix the regression of
g++.target/aarch64/return_address_sign_ab_exception.C that I
introduced with d8dadbc9a5199bf7bac1ab7376b0f84f45e94350.
'aarch_ra_sign_key' for aarch64 ended up being non defined in the opt
file and the function attribute
gcc/
* config/arm/arm.cc (arm_valid_target_attribute_rec): Add ARM function
attribute 'branch-protection' and parse its options.
* doc/extend.texi: Document ARM Function attribute 'branch-protection'.
gcc/testsuite/
* gcc.target/arm/acle/pacbti-m-predef-13.c: New
Kyrylo Tkachov writes:
[...]
>
> Ok.
> Thanks,
> Kyrill
Hi Kyrill,
thanks for reviewing. These and all the previous ones are in with the
requested ChangeLogs changes.
Regards
Andrea
Hi Richard,
thanks for reviewing and approving this series, this is now in.
BR
Andrea
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
"C".
* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
*
Hi all,
this 3rd series, similarly to the previous ones, rework the arm MVE
testsuite for better coverage. Contextually some trivial fixes to the
backend are performed.
23/23 also adds some extern "C" I forgot to add with the previous
series in order to fix those tests for C++.
Best Regards
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vqabsq_s): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
gcc/ChangeLog:
* config/arm/mve.md (@mve_vclzq_s): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Improve test.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vqnegq_s): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c:
gcc/ChangeLog:
* config/arm/mve.md (mve_vnegq_f, mve_vnegq_s):
Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c:
gcc/ChangeLog:
* config/arm/mve.md (mve_vclsq_s): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 32
Richard Earnshaw writes:
[...]
>
> Otherwise ok with that change.
>
> R.
Minor respin of this patch addressing the suggestion to have
'use_return_insn' return zero when PAC is enabled.
BR
Andrea
>From 0a894f73fc09be865b7a7cb205e871bf82f8abba Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Richard Earnshaw writes:
> On 09/01/2023 16:48, Richard Earnshaw via Gcc-patches wrote:
>> On 09/01/2023 14:58, Andrea Corallo via Gcc-patches wrote:
>>> Andrea Corallo via Gcc-patches writes:
>>>
>>>> Richard Earnshaw writes:
>>>>
>&g
Andrea Corallo via Gcc-patches writes:
> Richard Earnshaw writes:
>
>> On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote:
>>>
>>>> -Original Message-
>>>> From: Andrea Corallo
>>>> Sent: Tuesday, September 27, 2022 11:0
Richard Earnshaw writes:
> On 14/12/2022 17:00, Richard Earnshaw via Gcc-patches wrote:
>> On 14/12/2022 16:40, Andrea Corallo via Gcc-patches wrote:
>>> Hi Richard,
>>>
>>> thanks for reviewing.
>>>
>>> Richard Earnshaw writes:
>>>
Hi all,
respinning this as a rebase was necessary, also now is setting
'aarch_enable_bti' to zero as default for arm as suggested during the
review of 12/15.
Best Regards
Andrea
>From 6c765818542cc7b40701e8adae2cbe077d5982cc Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Date: Mon, 6 Dec
Hi Richard,
thanks for reviewing.
Richard Earnshaw writes:
> On 28/10/2022 17:40, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>> please find attached the third iteration of this patch addresing
>> review
>> comments.
>> Thanks
>>
Richard Earnshaw writes:
[...]
>
> + if (TARGET_TPCS_FRAME)
> +error ("Return address signing and %<-mtpcs-frame%> are
> incompatible.");
>
> So really this is 'not implemented' rather than not compatible - I
> don't see why we couldn't implement this if we really wanted to. It's
Richard Earnshaw writes:
> On 22/07/2022 16:09, Andrea Corallo via Gcc-patches wrote:
>> Richard Earnshaw writes:
>>
>>> On 21/07/2022 10:17, Andrea Corallo via Gcc-patches wrote:
>>>> Richard Earnshaw writes:
>>>>
>>>>
Hi Richard,
thanks for reviewing.
Richard Earnshaw writes:
> On 07/11/2022 08:57, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>> please find attached the lastest version of this patch incorporating
>> some
>> more improvents. Feel free to ignore V3.
&
Kyrylo Tkachov writes:
> Hi Andrea,
>
>> -Original Message-
>> From: Andrea Corallo
>> Sent: Wednesday, December 7, 2022 3:03 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov ; Richard Earnshaw
>> ; Andrea Corallo
>> Subject: [PATCH] arm: fix mve intrinsics scan body tests for
Kyrylo Tkachov writes:
> Hi Andrea,
>
>> -Original Message-
>> From: Andrea Corallo
>> Sent: Wednesday, December 7, 2022 3:03 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov ; Richard Earnshaw
>> ; Andrea Corallo
>> Subject: [PATCH] arm: fix mve intrinsics scan body tests for
Richard Earnshaw writes:
> On 06/12/2022 15:46, Andrea Corallo wrote:
>> Hi Richard,
>> thanks for reviewing.
>> Just one clarification before I complete the respin of this patch.
>> Richard Earnshaw writes:
>> [...]
>>
>>> Also, I think (out of an abundance of caution) we really need a
>>>
Hi Richard,
thanks for reviewing.
Just one clarification before I complete the respin of this patch.
Richard Earnshaw writes:
[...]
> Also, I think (out of an abundance of caution) we really need a
> scheduling barrier placed before calls to gen_aut_nop() pattern is
> emitted, to ensure that
Andrea Corallo via Gcc-patches writes:
> Hi all,
>
> ping^2 for patches 9/15 7/15 11/15 12/15 and 10/15 V2 of this series.
>
> Andrea
Hello all,
PING^3 for:
[PATCH 6/12 V2] arm: Add pointer authentication for stack-unwinding runtime
[PATCH 9/15] arm: Set again stack pointer
Andrea Corallo writes:
> Hi all,
>
> this is the first patch series about improving the current MVE
> implementation and testsuite for:
>
> - Complete intrinsic implementation and coverage (the list of intrinsics is
> specified by [1])
> - Verifying all instructions supposedly emitted by each
Kyrylo Tkachov writes:
[...]
>> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
>> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
>> index e03e9620528..b5c9f4d5eb8 100644
>> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
>> +++
Christophe Lyon writes:
> On 11/17/22 17:37, Andrea Corallo via Gcc-patches wrote:
>> From: Stam Markianos-Wright
>> In the past we had only defined the vsubq_x generic overload of the
>> vsubq_x_* intrinsics for float vector types. This would cause them
>> to fa
Kyrylo Tkachov writes:
>> -Original Message-
>> From: Andrea Corallo
>> Sent: Thursday, November 17, 2022 4:38 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov ; Richard Earnshaw
>> ; Andrea Corallo
>> Subject: [PATCH 10/35] arm: improve tests for vabavq*
>>
>>
From: Stam Markianos-Wright
It was observed that in tests `vaddq_m_n_[s/u][8/16/32].c`, the _Generic
resolution would fall back to the `__ARM_undef` failure state.
This is a regression since `dc39db873670bea8d8e655444387ceaa53a01a79` and
`6bd4ce64eb48a72eca300cb52773e6101d646004`, but it
From: Stam Markianos-Wright
This patch adds explicit references to other float types
to __ARM_mve_typeid in arm_mve.h. Resolves PR 107515:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107515
gcc/ChangeLog:
PR 107515
* config/arm/arm_mve.h (__ARM_mve_typeid): Add float types.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
gcc/ChangeLog:
* config/arm/mve.md (mve_vaddlvq_p_v4si)
(mve_vaddq_n_, mve_vaddvaq_)
(mve_vaddlvaq_v4si, mve_vaddq_n_f)
(mve_vaddlvaq_p_v4si, mve_vaddq, mve_vaddq_f):
Fix spacing.
gcc/testsuite/ChangeLog:
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c:
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c:
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c:
* gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c:
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vmlaldavaq_)
(mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): Fix
spacing vs tabs.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests.
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vsubq_n_f): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vsubq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c:
gcc/ChangeLog:
* config/arm/mve.md (mve_vrmlaldavhq_v4si,
mve_vrmlaldavhaq_v4si): Fix spacing vs tabs.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.
---
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c:
From: Stam Markianos-Wright
In the past we had only defined the vsubq_x generic overload of the
vsubq_x_* intrinsics for float vector types. This would cause them
to fall back to the `__ARM_undef` failure state if they was called
through the generic version.
This patch simply adds these
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vabdq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vabsq_f): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vabsq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise.
---
.../arm/mve/intrinsics/vfmasq_m_n_f16.c | 50 ---
.../arm/mve/intrinsics/vfmasq_m_n_f32.c | 50
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c:
---
.../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 34 ++-
Hi all,
this is the first patch series about improving the current MVE
implementation and testsuite for:
- Complete intrinsic implementation and coverage (the list of intrinsics is
specified by [1])
- Verifying all instructions supposedly emitted by each intrinsic
- Verifying register usage
-
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c:
gcc/ChangeLog:
* config/arm/mve.md (mve_vdupq_n_f)
(mve_vdupq_n_, mve_vdupq_m_n_)
(mve_vdupq_m_n_f): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c:
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vabavq_p_s16.c:
* gcc.target/arm/mve/intrinsics/vabavq_p_s32.c:
* gcc.target/arm/mve/intrinsics/vabavq_p_s8.c:
* gcc.target/arm/mve/intrinsics/vabavq_p_u16.c:
*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c:
gcc/ChangeLog:
* config/arm/mve.md (mve_vdwdupq_m_wb_u_insn): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise.
*
gcc/ChangeLog:
* config/arm/mve.md (mve_vddupq_u_insn): Fix 'vddup.u'
spacing.
(mve_vddupq_m_wb_u_insn): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c :
gcc/ChangeLog:
* config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix
'vmsr' spacing and reg capitalization.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c:
Update test.
*
Hi all,
please find attached the latest version of this patch now updating the
stack pointer value after the pop used to read the PAC value.
Best Regards
Andrea
>From a78acf8804daa3d493b419b4998f4ac705869ff9 Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Date: Mon, 6 Dec 2021 11:42:11 +0100
Hi all,
please find attached the lastest version of this patch incorporating some
more improvents. Feel free to ignore V3.
Best Regards
Andrea
>From 869630801de2d3df03ce2f2551fd801dd59a640c Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Date: Thu, 20 Jan 2022 15:36:23 +0100
Subject: [PATCH]
Hi all,
please find attached the third iteration of this patch addresing review
comments.
Thanks
Andrea
>From e3001bd662b84dafeca200b52fc644b7bf81c4af Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Date: Thu, 7 Apr 2022 11:51:56 +0200
Subject: [PATCH] [PATCH 12/15] arm: implement bti
Hi all,
the third iteration of this patch is attached addresing review comments.
Thanks
Andrea
>From b42e28be75f374a4e1a5943c8c9002e07dbcc567 Mon Sep 17 00:00:00 2001
From: Andrea Corallo
Date: Thu, 20 Jan 2022 15:36:23 +0100
Subject: [PATCH] [PATCH 10/15] arm: Implement cortex-M return
Richard Earnshaw writes:
> On 14/09/2022 15:20, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>>
>> this patch enables address return signature and verification based on
>> Armv8.1-M Pointer Authentication [1].
>>
>> To sign the return address, we use
Richard Earnshaw writes:
> On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote:
>>
>>> -Original Message-
>>> From: Andrea Corallo
>>> Sent: Tuesday, September 27, 2022 11:06 AM
>>> To: Kyrylo Tkachov
>>> Cc: Andr
Richard Earnshaw writes:
> On 21/09/2022 09:07, Andrea Corallo via Gcc-patches wrote:
>> Hi all,
>> ping^2 for patches 9/15 7/15 11/15 12/15 and 10/15 V2 of this
>> series.
>>Andrea
>
> Subject says xx/15, but I only see 1-12 from you.
>
> R.
Yeah
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