ibffi itself...
> This patch is specific to gcc because the multilib part is specific
> to gcc.
> I'll ask the community but the patch cannot be merged inside
> libffi.
>
> Thanks,
> Clément
> ____
> From: David Edelsohn
> Sent: Wednesday, Septem
On Wed, Sep 15, 2021 at 4:41 AM Kewen.Lin wrote:
>
> Hi,
>
> Gentle ping this patch:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2021-September/578553.html
>
>
> BR,
> Kewen
>
> on 2021/9/1 下午2:56, Kewen.Lin via Gcc-patches wrote:
> > Hi!
> >
> > Option toc-fusion was intended for Power9 toc
Hi, Xionhu
Should "altivec_vsel2" .. 3 .. 4 be "*altivec_vsel2", etc.
because they are combiner patterns and never referenced by name? Only
the first, named pattern is referenced by the builtin code.
Other than that question / suggestion, this patch is okay. Please
coordinate with Bill and his
Clement,
GCC is not the primary repository for libffi. This patch must be
submitted to the libffi project first, not GCC. If it is accepted in
libffi, then you can ask for a backport to GCC.
https://github.com/libffi/libffi
Thanks, David
On Wed, Sep 15, 2021 at 7:20 AM CHIGOT, CLEMENT
On Thu, Sep 9, 2021 at 11:03 PM Hongtao Liu wrote:
>
> On Fri, Sep 10, 2021 at 7:49 AM Segher Boessenkool
> wrote:
> >
> > On Thu, Sep 09, 2021 at 08:16:16AM +0200, Richard Biener wrote:
> > > > I think we should (longer term) get rid of the overloaded meanings and
> > > > uses of subregs. One
On Wed, Sep 8, 2021 at 1:10 PM Segher Boessenkool
wrote:
>
> Hi!
>
> On Wed, Sep 08, 2021 at 08:42:44AM +0200, Richard Biener wrote:
> > On Wed, Sep 8, 2021 at 1:08 AM Segher Boessenkool
> > wrote:
> > > The core of the problem is that subreg of pseudos has three meanings:
> > > -- Paradoxical
On Thu, Sep 2, 2021 at 10:31 PM Xionghu Luo wrote:
>
> Resend the patch that addressed Will's comments.
>
>
> fmod/fmodf and remainder/remainderf could be expanded instead of library
> call when fast-math build, which is much faster.
>
> fmodf:
> fdivs f0,f1,f2
> frizf0,f0
>
This patch is okay.
Thanks, David
On Fri, Aug 27, 2021 at 12:41 PM Bill Schmidt wrote:
>
> Hi Mike,
>
> Thanks for this clean-up!
>
> On 8/25/21 5:09 PM, Michael Meissner wrote:
> > From 327273dfeec5c000f3c33ca7b88ee0097fd33586 Mon Sep 17 00:00:00 2001
> > From: Michael Meissner
> > Date:
Further fixes to structure alignment when the structure is packed
and contains double. This patch checks for packed attribute
at the top level.
Bootstrapped on powerpc-ibm-aix7.2.3.0
gcc/ChangeLog:
PR target/102068
* config/rs6000/rs6000.c
On Thu, Aug 26, 2021 at 6:53 PM Segher Boessenkool
wrote:
>
> Hi!
>
> On Thu, Aug 26, 2021 at 02:57:35PM -0400, David Edelsohn wrote:
> > * config/rs6000/ibm-ldouble.c (ldouble_qadd_internal): Rename
> > from
> > __gcc_qadd.
>
While performing some tests of IEEE 128 float for PPC64LE, Michael
Meissner noticed that __gcc_qsub is substantially slower than
__gcc_qadd. __gcc_qsub calls __gcc_add with the second operand
negated. Because the functions normally are invoked through
libgcc shared object,
rs6000: inline ldouble __gcc_qsub
While performing some tests of IEEE 128 float for PPC64LE, Michael
Meissner noticed that __gcc_qsub is substantially slower than
__gcc_qadd. __gcc_qsub valls __gcc_add with the second operand
negated. Because the functions normally are
AIX 7.3 system headers are C++ safe and GCC no longer needs to define
SYSTEM_IMPLICIT_EXTERN_C for AIX 7.3. This patch moves the definition
from aix.h to the individual OS-level configuration files and does not
define the macro for AIX 7.3.
The patch also corrects the
ires more adjustment in
the Makefile.
Thanks, David
On Thu, Aug 19, 2021 at 1:57 AM Kewen.Lin wrote:
>
> Hi David,
>
> on 2021/8/19 上午11:26, David Edelsohn via Gcc-patches wrote:
> > Hi, Martin
> >
> > A few PowerPC-specific testcases started failing yesterday on AIX
Hi, Martin
A few PowerPC-specific testcases started failing yesterday on AIX with
a strange failure mode: the compiler runs out of memory. As you may
expect from telling you this in an email reply to your patch, I have
bisected the failure and landed on your commit. I can alternate
between the
On Fri, Aug 13, 2021 at 12:20 AM Michael Meissner
wrote:
>
> Move xx* builtins to vsx.md.
>
> I originally posted this patch in May. It needed a slight tune up as the
> souces have changed, so I'm reposting it now.
>
> I noticed that the xx built-in functions (xxspltiw, xxspltidp, xxsplti32dx,
>
This causes a bootstrap failure for me.
PR/101959
On Tue, Aug 17, 2021 at 5:00 AM Richard Biener via Gcc wrote:
>
> On Tue, Aug 17, 2021 at 8:40 AM Thomas Schwinge
> wrote:
> >
> > Hi!
> >
> > On 2021-08-16T14:10:00-0600, Martin Sebor wrote:
> > > On 8/16/21 6:44 AM, Thomas Schwinge wrote:
>
On Fri, Aug 13, 2021 at 4:24 PM Segher Boessenkool
wrote:
>
> On Fri, Aug 13, 2021 at 02:07:25PM -0400, David Edelsohn wrote:
> > On Fri, Aug 13, 2021 at 12:08 PM Segher Boessenkool
> > wrote:
> > >
> > > On Fri, Aug 13, 2021 at 11:15:21AM -0400, David Ed
On Fri, Aug 13, 2021 at 12:08 PM Segher Boessenkool
wrote:
>
> On Fri, Aug 13, 2021 at 11:15:21AM -0400, David Edelsohn wrote:
> > On Fri, Aug 13, 2021 at 10:49 AM Segher Boessenkool
> > wrote:
> > >
> > > On Fri, Aug 13, 2021 at 12:14:14AM -0400, Micha
On Fri, Aug 13, 2021 at 10:49 AM Segher Boessenkool
wrote:
>
> On Fri, Aug 13, 2021 at 12:14:14AM -0400, Michael Meissner wrote:
> > I noticed that the xxeval built-in function used the
> > altivec_register_operand
> > predicate. Since it takes vsx registers, this might force the register
> >
On Fri, Aug 13, 2021 at 12:14 AM Michael Meissner
wrote:
>
> Fix xxeval predicates (PR 99921).
>
> I originally posted this patch in May and in June. I'm reposting it now.
>
> I noticed that the xxeval built-in function used the altivec_register_operand
> predicate. Since it takes vsx
On Tue, Aug 10, 2021 at 7:37 PM Peter Bergner wrote:
>
> PR101849 shows we ICE on a test case when we pass a non __vector_pair *
> pointer to the __builtin_vsx_lxvp and __builtin_vsx_stxvp built-ins
> that is cast to __vector_pair *. The problem is that when we expand
> the built-in, the cast
> Copy the test for _mm_minpos_epu16 from
> gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c, with
> a few adjustments:
>
> - Adjust the dejagnu directives for powerpc platform.
> - Make the data not be monotonically increasing,
> such that some of the returned values are not
> always the first
> Add a naive implementation of the subject x86 intrinsic to
> ease porting.
>
> 2021-07-15 Paul A. Clarke
>
> gcc
> * config/rs6000/smmintrin.h (_mm_minpos_epu16): New.
Segher already approved this with the changes requested.
Thanks, David
> [PATCH] PR 100168: Fix call test on power10.
>
> Fix a test that was checking for 64-bit TOC calls, to also allow for
> PC-relative calls.
>
> I have verified that this test passes when run on a power10 system configured
> with --with-cpu=power10 and it continues to pass on power9 little endian
AIX math.h provides C++ overloaded inlined math functions, which should
not be present for G++. The definitions have been guaded by
__COMPATMATH__, but that macro had other uses in IBM xlC++. A new
macro has been introduced with the sole purpose of guarding the functions.
This
On Thu, Jul 15, 2021 at 11:25 AM Bill Schmidt wrote:
>
> Hi,
>
> Segher preapproved this patch in https://gcc.gnu.org/PR101129. It differs
> slightly from what was posted there, needing an additional test to ensure the
> insn is a SET. The patch also includes the test case provided by the OP.
On Wed, Jul 14, 2021 at 8:01 PM Alan Modra wrote:
>
> On Wed, Jun 30, 2021 at 05:06:30PM -0300, Tulio Magno Quites Machado Filho
> wrote:
> > Alan Modra via Gcc-patches writes:
> >
> > > Compiling gcc/testsuite/gcc.dg/split-*.c and others with -mcpu=power10
> > > and linking with a non-pcrel
On Wed, Jul 7, 2021 at 4:01 PM Michael Meissner wrote:
>
> [PATCH] Fix vec-splati-runnable.c test.
>
> I noticed that the vec-splati-runnable.c did not have an abort after one
> of the tests. If the test was run with optimization, the optimizer could
> delete some of the tests and throw off the
On Mon, Jul 12, 2021 at 1:47 PM Bill Schmidt wrote:
>
> On 7/12/21 12:16 PM, Michael Meissner wrote:
> > On Sun, Jul 11, 2021 at 02:55:04PM -0500, Bill Schmidt wrote:
> >> Hi Mike,
> >>
> >> On 7/7/21 3:04 PM, Michael Meissner wrote:
> >>> [PATCH] PR 100167: Fix vector long long multiply/divide
On Mon, Jul 12, 2021 at 12:07 PM Bill Schmidt wrote:
>
> Hi Mike,
>
> On 7/7/21 2:59 PM, Michael Meissner wrote:
> > [PATCH] Change rs6000_const_f32_to_i32 return type.
> >
> > The function rs6000_const_f32_to_i32 called REAL_VALUE_TO_TARGET_SINGLE
> > with a long long type and returns it. This
On Wed, Jul 7, 2021 at 4:03 PM Michael Meissner wrote:
>
> [PATCH] Deal with prefixed loads/stores in tests, PR testsuite/100166
>
> This patch updates the various tests in the testsuite to treat plxv
> and pstxv as being vector loads/stores. This shows up if you run the
> testsuite with a
On Mon, Jul 12, 2021 at 11:58 AM Richard Sandiford
wrote:
>
> David Edelsohn writes:
> > On Fri, Jul 9, 2021 at 1:31 PM Richard Sandiford
> > wrote:
> >>
> >> David Edelsohn writes:
> >> > On Fri, Jul 9, 2021 at 12:53 PM Richard San
testsuite: Disable BTF and CTF testsuite on AIX.
CTF utilizes DWARF sections, but it is a distinct debugging
format. The CTF support in GCC is not implemented as a
separate debugging format. AIX supports DWARF but not CTF
sections.
aix: align text CSECTs to at least 32 bytes.
Bootstrapped on powerpc-ibm-aix7.2.3.0.
Thanks, David
gcc/ChangeLog:
* config/rs6000/rs6000.c (rs6000_xcoff_section_type_flags):
Increase code CSECT alignment to at least 32 bytes.
* config/rs6000/xcoff.h
On Tue, Jun 29, 2021 at 10:33 AM Joseph Myers wrote:
>
> There's now a build failure for sparc64-linux-gnu:
>
> In file included from ./tm_p.h:4:0,
> from /scratch/jmyers/glibc-bot/src/gcc/gcc/ctfout.c:24:
> /scratch/jmyers/glibc-bot/src/gcc/gcc/config/sparc/sparc-protos.h:46:47:
bootstrap: Include tm_p.h in btfout.c and ctfout.c.
btfout.c and ctfout.c reference target-specific macros that
may reference target-specific functions that are declared in a
target-specific header. tm_p.h must be included to access the
target-specific header.
aix: Add AIX 7.3 configuration and SPDX License Identifiers.
The anticipated release of AIX 7.3 has been announced. This
patch adds the configuration bits based on AIX 7.2 configuration.
gcc/ChangeLog:
* config.gcc: Add SPDX License Identifier.
aix: Use assemble_name to output BSS section name.
The code to emit BSS CSECT needs to support user assembler name.
* config/rs6000/rs6000.c
(rs6000_xcoff_asm_output_aligned_decl_common):
Use assemble_name to output BSS section name.
diff --git
+DavidMalcolm
Can you review this patch when you have a moment?
Thanks, David
On Mon, May 17, 2021 at 3:05 PM David Edelsohn wrote:
>
> The aix.h change is okay with me, but you need to get approval for the
> incpath.c and cpplib.h parts of the patch from the appropriate
>
On Fri, May 21, 2021 at 5:25 AM Martin Liška wrote:
>
> On 5/20/21 2:54 PM, Richard Biener wrote:
> > On Thu, May 20, 2021 at 2:34 PM Martin Liška wrote:
> >>
> >> Hello.
> >>
> >> I've got a patch candidate that leverages partial linking for a couple of
> >> selected object files.
> >>
> >>
This should not use warning_at because there is no location. There is
a separate "warning" diagnostic that should be used.
I will test with a correct implementation.
Thanks, David
On Thu, May 20, 2021 at 4:13 AM CHIGOT, CLEMENT wrote:
>
> AIX ld allows archives to contain text files by simply
The aix.h change is okay with me, but you need to get approval for the
incpath.c and cpplib.h parts of the patch from the appropriate
maintainers.
Thanks, David
On Mon, May 17, 2021 at 7:44 AM CHIGOT, CLEMENT wrote:
>
> On AIX, stat will store inodes in 32bit even when using LARGE_FILES.
> If
AIX XCOFF symbols can be labels or qualnames (names with an appended
mapping class). CSECTs must be declared with a mapping class.
Within an assembler file, the symbol names with and without the mapping
class are unique. An object file symbol table only presents the symbol
On Tue, May 4, 2021 at 7:12 AM Jonathan Wakely wrote:
>
> On 30/04/21 16:24 -0400, David Edelsohn via Libstdc++ wrote:
> >On Fri, Jan 8, 2021 at 11:10 AM Jonathan Wakely wrote:
> >>
> >> On 03/01/21 22:26 -0500, David Edelsohn via Libstdc++ wrote:
> >> &
AIX symbol references can refer to either the symbol (a label) or a
symbol with a qualifier (the storage mapping class). The storage mapping
class provide information about the underlying COFF section into which the
symbol will be placed, e.g. [RO] for read-only in the text section,
[RW] for
On Fri, Apr 30, 2021 at 3:31 PM Jonathan Wakely wrote:
>
> On 29/04/21 16:06 -0400, David Edelsohn wrote:
> >On Fri, Jan 8, 2021 at 1:37 PM Jonathan Wakely wrote:
> >>
> >> On 06/01/21 19:41 -0500, David Edelsohn wrote:
> >> >Thanks for clarifying the i
On Fri, Jan 8, 2021 at 1:37 PM Jonathan Wakely wrote:
>
> On 06/01/21 19:41 -0500, David Edelsohn wrote:
> >Thanks for clarifying the issue.
> >
> >As you implicitly point out, GCC knows the type of INT64 and defines
> >the macro __INT64_TYPE__ . The revi
-fdata-sections places data symbols into their own, unique, named sections.
-fsection-anchors create an anchor to access neighboring symbols
within a section.
When both are enabled, a separate section anchor is created for each
symbol, which provides no benefit.
This
GCC on AIX historically has used -maix64 and -maix32 to switch to
64 bit mode
or 32 bit mode, unlike other ports that use -m64 and -m32. The Alias()
directive for options cannot be used because aix64 is expected in multiple
parts of the compiler infrastructure and one cannot
On Mon, Apr 26, 2021 at 11:50 AM Jonathan Wakely wrote:
>
> On 26/04/21 09:17 -0400, David Edelsohn via Libstdc++ wrote:
> >On Mon, Apr 26, 2021 at 7:19 AM Jonathan Wakely wrote:
> >>
> >> On 23/04/21 20:54 -0400, David Edelsohn via Libstdc++ wrote:
> >> &
On Mon, Apr 26, 2021 at 7:19 AM Jonathan Wakely wrote:
>
> On 23/04/21 20:54 -0400, David Edelsohn via Libstdc++ wrote:
> >Some ports require libatomic for atomic operations, at least for some
> >data types and widths. The libstdc++ testsuite previously was updated
> >t
Some ports require libatomic for atomic operations, at least for some
data types and widths. The libstdc++ testsuite previously was updated
to link against libatomic, but the search path was hard-coded to
something that is not always correct, and the shared library search
path was not set.
The
As requested at the end of Stage 4, this patch changes the debugging
format for AIX configuration of GCC to "DWARF2". This is in
preparation for removing stabs debugging support from GCC.
The rs6000 configuration files remain somewhat intertwined with the
stabs debugging support, but the
On Wed, Apr 21, 2021 at 3:42 PM Martin Liška wrote:
>
> On 4/21/21 6:03 PM, David Edelsohn via Gcc-patches wrote:
> > I am requesting a freeze on non-bug fix patches to trunk.
> >
> > In the GCC 12 announcement, Jakub stated:
> >
> > "The trunk has branch
On Wed, Apr 21, 2021 at 3:16 PM Jakub Jelinek wrote:
>
> On Wed, Apr 21, 2021 at 08:28:55PM +0200, Jakub Jelinek via Gcc-patches wrote:
> > > There's a patch attempt for the problem with
> > > std::thread::hardware_concurrency where
> > > it's used only if _GLIBCXX_HAS_GTHREADS is set.
> > >
> >
I am requesting a freeze on non-bug fix patches to trunk.
In the GCC 12 announcement, Jakub stated:
"The trunk has branched for the GCC 11 release and is now open
again for general development, stage 1. Please consider not
disrupting it too much during the RC phase of GCC 11 so it
is possible
This patch broke bootstrap on AIX.
std::thread is not provided in all instances. GCC is not compiled
multi-threaded by default.
error: `std::thread' has not been declared.
Thanks, David
Hi, Jonathan
Thanks for the further investigation. I definitely encountered the
missing _M_try_acquire in __platform_semaphore.
Thanks, David
On Wed, Apr 21, 2021 at 8:12 AM Jonathan Wakely wrote:
>
> On 21/04/21 12:38 +0100, Jonathan Wakely wrote:
> >On 20/04/21 22:12 -0700, Thomas Rodgers
On 4/16/21 8:56 AM, Bill Schmidt via Gcc-patches wrote:
> The standard for many Power vector interfaces is now the recently
> published Power Vector Intrinsics Programming Reference. Reference
> that document for the relevant interfaces, and remove redundant
> information from the GCC user's
AIX uses a compiler-managed TOC for global data, including TLS symbols.
The GCC TOC implementation manages the TOC entries through the
constant pool.
TLS symbols sometimes require a function call to obtain the TLS base
pointer. The arguments to the TLS call can conflict with
On Thu, Apr 1, 2021 at 12:45 AM Martin Liška wrote:
>
> On 3/31/21 8:45 PM, David Edelsohn via Gcc-patches wrote:
> > This patch is causing new crashes in the testsuite.
> >
> > ICE in release_body, at graph.c:1863
> > ranges offset out of range
This patch is causing new crashes in the testsuite.
ICE in release_body, at graph.c:1863
ranges offset out of range
Thanks, David
GCC currently emits TLS relocation decorations on symbols in DWARF sections.
Recent changes to the AIX linker cause it to reject such symbols.
This patch removes the decorations (@ie, @le, @m) and emit only the
qualified symbol name.
Bootstrapped on powerpc-ibm-aix7.3.2.0.
On Fri, Mar 26, 2021 at 11:27 PM Xionghu Luo wrote:
>
> From: "luo...@cn.ibm.com"
>
> 32bit and P7 VSX could also benefit a lot from the variable vec_insert
> implementation with shift/insert/shift back method.
>
> Tested pass on P7BE/P8BE/P8LE{-m32,m64} and P9LE{m64}.
I successfully
On Wed, Mar 24, 2021 at 11:30 AM Iain Sandoe wrote:
>
> David Edelsohn via Gcc-patches wrote:
>
> > On Wed, Mar 24, 2021 at 3:51 AM Richard Biener
> > wrote:
> >> On Wed, Mar 24, 2021 at 3:03 AM David Edelsohn wrote:
> >>> On Mon, Mar 22, 2
On Wed, Mar 24, 2021 at 11:32 PM Xionghu Luo wrote:
>
> On 2021/3/24 23:56, David Edelsohn wrote:
> > On Wed, Mar 24, 2021 at 1:44 AM Xionghu Luo wrote:
> >> l2 cache size for Power8 is 512kB, correct the copy paste error from
> >> Power7.
> >> Te
On Wed, Mar 24, 2021 at 3:46 PM David Edelsohn wrote:
>
> On Wed, Mar 24, 2021 at 11:30 AM Iain Sandoe wrote:
> >
> > David Edelsohn via Gcc-patches wrote:
> >
> > > On Wed, Mar 24, 2021 at 3:51 AM Richard Biener
> > > wrote:
> > >>
On Wed, Mar 24, 2021 at 11:30 AM Iain Sandoe wrote:
>
> David Edelsohn via Gcc-patches wrote:
>
> > On Wed, Mar 24, 2021 at 3:51 AM Richard Biener
> > wrote:
> >> On Wed, Mar 24, 2021 at 3:03 AM David Edelsohn wrote:
> >>> On Mon, Mar 22, 2
On Wed, Mar 24, 2021 at 1:44 AM Xionghu Luo wrote:
>
> l2 cache size for Power8 is 512kB, correct the copy paste error from Power7.
> Tested no performance change for SPEC2017.
>
> gcc/ChangeLog:
>
> 2021-03-24 Xionghu Luo
>
> * config/rs6000/rs6000.c (struct processor_costs): Change
On Wed, Mar 24, 2021 at 3:51 AM Richard Biener
wrote:
>
> On Wed, Mar 24, 2021 at 3:03 AM David Edelsohn wrote:
> >
> > On Mon, Mar 22, 2021 at 4:10 AM Richard Biener
> > wrote:
> >
> > > Oh, and for a type like
> > >
On Mon, Mar 22, 2021 at 4:10 AM Richard Biener
wrote:
> Oh, and for a type like
>
> struct { struct { struct { ... { double x; } } } } } };
>
> the layout now looks quadratic in work (each field layout will look at
> the nest rooted at it
> up to the bottom). It looks to me as we require(?)
The AIX power alignment rules apply the natural alignment of the
"first member" if it is of a floating-point data type (or is an aggregate
whose recursively "first" member or element is such a type). The alignment
associated with these types for subsequent members use an alignment value
where the
Thanks again and looking forward to your advice.
>
> On 18/3/2021 上午 8:57, David Edelsohn wrote:
> > On Wed, Mar 17, 2021 at 8:26 PM Segher Boessenkool
> > wrote:
> >> Hi!
> >>
> >> On Wed, Mar 17, 2021 at 03:35:30PM -0400, David Edelsohn wrote:
> >
On Wed, Mar 17, 2021 at 8:26 PM Segher Boessenkool
wrote:
>
> Hi!
>
> On Wed, Mar 17, 2021 at 03:35:30PM -0400, David Edelsohn wrote:
> > I disagree with your new definitions and I disagree with the manner in
> > which you are trying to change the values.
>
> Yes
Hao,
What are you trying to change? What are you trying to enable?
Section Anchors already are enabled in the rs6000 port.
MIN_ANCHOR_OFFSET and MAX_ANCHOR_OFFSET already are defined with other
values and for good reason. From rs6000.c:
/* Use a 32-bit anchor range. This leads to sequences
On Tue, Mar 16, 2021 at 10:23 PM HAO CHEN GUI wrote:
>
> Segher,
>
> The const_anchor should work on both 64 and 32 bit. I think the
> constant loading is cheap on 32 bit platform, so I only enabled it on
> 64 bit. I will add a test case and verify the patch on Darwin and AIX.
I will say
I suspect that this is incorrect. Did you look at the discussion of
the choice of anchor limits when first implemented? We specifically
chose 32 bit range.
Thanks, David
On Tue, Mar 16, 2021 at 10:21 AM will schmidt wrote:
>
> On Mon, 2021-03-15 at 11:11 +0800, HAO CHEN GUI via Gcc-patches
removes the need to create a file-local name for the TBSS
data.
Bootstrapped on powerpc-ibm-aix7.2.3.0.
gcc/ChangeLog:
2021-03-11 David Edelsohn
PR target/99094
* config/rs6000/rs6000.c (rs6000_xcoff_file_start): Don't create
alignment.
Bootstrapped on powerpc-ibm-aix7.2.3.0.
gcc/ChangeLog:
2021-03-10 David Edelsohn
PR target/99492
* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Add check for DCmode.
* config/rs6000/rs6000.c (rs6000_special_round_type_align): Same.
gcc
The new pr99305.C testcase is failing on Power.
FAIL: g++.dg/opt/pr99305.C -std=gnu++14 scan-tree-dump-times
optimized " = (unsigned char) c_[0-9]*(D);" 3
FAIL: g++.dg/opt/pr99305.C -std=gnu++17 scan-tree-dump-times
optimized " = (unsigned char) c_[0-9]*(D);" 3
This patch adds missing periods to the symbol name for TLS helper functions.
Bootstrapped on powerpc-ibm-aix7.2.2.0.
Thanks, David
* config/rs6000/rs6000.md (tls_get_tpointer_internal): Prepend
period to symbol name.
(tls_get_addr_internal): Same.
diff
On Tue, Mar 2, 2021 at 8:48 AM Richard Sandiford
wrote:
>
> Alexandre Oliva writes:
> > On Feb 26, 2021, Segher Boessenkool wrote:
> >
> >> On Fri, Feb 26, 2021 at 12:31:16PM -0500, David Edelsohn wrote:
> >>> On Fri, Feb 26, 2021 at
gt; On Fri, Feb 26, 2021 at 12:31:16PM -0500, David Edelsohn wrote:
> >> On Fri, Feb 26, 2021 at 11:09 AM Alexandre Oliva wrote:
> >> >
> >> > This patch avoids an ICE in gimplefe-28.c, in our ppc64-vxworks7r2
> >> > tests. Tested on x86_64-li
On Fri, Feb 26, 2021 at 11:14 AM Alexandre Oliva wrote:
>
> These tests use -mvsx in their dg-options list, so they are only
> applicable if the -mvsx option is supported by the compiler.
>
> Tested with target ppc64-vx7r2, configured to force altivec disabled,
> and thus to reject vsx. Ok to
On Fri, Feb 26, 2021 at 11:09 AM Alexandre Oliva wrote:
>
> This patch avoids an ICE in gimplefe-28.c, in our ppc64-vxworks7r2
> tests. Tested on x86_64-linux-gnu, and on the affected platform. Ok to
> install?
I'm sort of surprised that sqrt instruction would be available for the
target but
On Thu, Feb 25, 2021 at 8:05 PM Peter Bergner wrote:
>
> The initialization of compat builtins assumes the builtin we are creating
> a compatible builtin for exists and ICEs if it doesn't. However, there are
> valid reasons why some builtins are disabled for a particular compile.
> In this case,
On Thu, Feb 4, 2021 at 4:26 PM Segher Boessenkool
wrote:
>
> Hi!
>
> On Thu, Feb 04, 2021 at 09:26:47PM +0100, Jakub Jelinek wrote:
> > On Mon, Nov 16, 2020 at 06:14:52PM -0500, David Edelsohn via Gcc-patches
> > wrote:
> > > Jenkins does function on AIX. I w
Okay.
Thanks, David
On Mon, Feb 1, 2021 at 2:17 PM wrote:
>
> From: Aaron Sawdey
>
> In a previous fusion-combine patch for rs6000, Segher had asked me to
> comment out the automatic regeneration of fusion.md. And more recently
> Edelsohn pointed out that gcc_update needed to fix the timestamp
AIX only permits use of Altivec VSRs 20-31 in a Vector Extended ABI mode.
This patch explicitly enables use of the VSRs using the new -mabi=vec-extabi
command line option also implemented in LLVM for AIX.
Bootstrapped on powerpc-ibm-aix7.2.3.0 and powerpc64le-linux-gnu.
the testcase in
a follow-up patch.
Thanks for the clarification about P9 support. 32 bit doesn't have a
fast mechanism to move SImode to SFmode.
Thanks, David
On Tue, Jan 26, 2021 at 10:56 PM Xionghu Luo wrote:
>
> Hi,
>
> On 2021/1/27 03:00, David Edelsohn wrote:
> > On Tue, Ja
On Tue, Jan 26, 2021 at 10:56 PM Xionghu Luo wrote:
>
> Hi,
>
> On 2021/1/27 03:00, David Edelsohn wrote:
> > On Tue, Jan 26, 2021 at 2:46 AM Xionghu Luo wrote:
> >>
> >> From: "luo...@cn.ibm.com"
> >>
> >> UNSPEC_SI_FROM_SF is no
utilize the
optimization. Would you please check / clarify?
Thanks, David
>
> gcc/ChangeLog:
>
> 2021-01-26 Xionghu Luo
> David Edelsohn
>
> PR target/98799
> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
>
On Tue, Jan 26, 2021 at 1:11 PM will schmidt wrote:
>
> On Tue, 2021-01-26 at 01:46 -0600, Xionghu Luo via Gcc-patches wrote:
> > From: "luo...@cn.ibm.com"
> >
> > (rs6000_expand_vector_set_var): Delete.
>
> The diff conflates the deleted function with the changes to an existing
>
Boessenkool
wrote:
>
> On Fri, Jan 22, 2021 at 03:02:47PM -0500, David Edelsohn wrote:
> > All of these testcases no fail on AIX. This was not tested properly.
> > Please fix.
>
> They fail on -m32 Linux as well: all failures are an unexpected count
> of addi insns. Thi
On Thu, Jan 21, 2021 at 6:51 PM Segher Boessenkool
wrote:
>
> Hi!
>
> You never committed 2/4? That makes it harder to review this one :-)
>
> On Sat, Oct 10, 2020 at 03:08:24AM -0500, Xionghu Luo wrote:
> > gcc/ChangeLog:
> >
> > 2020-10-10 Xionghu Luo
> >
> > *
All of these testcases no fail on AIX. This was not tested properly.
Please fix.
Thanks, David
On Thu, Jan 21, 2021 at 7:19 PM Segher Boessenkool
wrote:
>
> Hi!
>
> On Sat, Oct 10, 2020 at 03:08:25AM -0500, Xionghu Luo wrote:
> > 2020-10-10 Xionghu Luo
> >
> > *
aix: make ctype_inline.h thread-safe and avoid _OBJ_DATA char subscript.
g++.dg/warn/Wstringop-overflow-6.C tests for a bogus overflow warning in
system headers. This testcase was generating a -Wchar-subscript warning
on AIX because ctype_inline.h was subscripting AIX _OBJ_DATA
if lines are added to the file.
Thanks, David
On Mon, Jan 18, 2021 at 4:40 PM sunil.k.pandey wrote:
>
> On Linux/x86_64,
>
> b654d23a470af25442e496ba62b5558e7c3ff1e6 is the first bad commit
> commit b654d23a470af25442e496ba62b5558e7c3ff1e6
> Author: David Edelsohn
> Date: Sun
On Mon, Jan 18, 2021 at 11:49 AM Jakub Jelinek wrote:
>
> On Mon, Jan 18, 2021 at 11:31:37AM -0500, David Edelsohn via Gcc-patches
> wrote:
> > On Mon, Jan 18, 2021 at 6:01 AM Mark Wielaard wrote:
> > >
> > > Hi David,
> > >
> > > On Sun, Jan
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