[RFC PATCH] RISC-V: Implement riscv_minimal_hwprobe_feature_bits

This patch implements the riscv_minimal_hwprobe_feature_bits feature for the RISC-V target. The feature bits are defined in the previous patch [1] to provide bitmasks of ISA extensions that defined in RISC-V C-API. Thus, we need a function to generate the feature bits for IFUNC resolver to dispatch

[PATCH v6] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

. libgcc/ChangeLog: * config/riscv/feature_bits.c: New. * config/riscv/t-elf (LIB2ADD): Add feature_bits.c. Co-Developed-by: Yangyu Chen Signed-off-by: Yangyu Chen --- libgcc/config/riscv/feature_bits.c | 364 + libgcc/config/riscv/t-elf | 1

[PATCH v5] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

/feature_bits.c: New. * config/riscv/t-elf (LIB2ADD): Add feature_bits.c. Co-Developed-by: Yangyu Chen Signed-off-by: Yangyu Chen --- libgcc/config/riscv/feature_bits.c | 364 + libgcc/config/riscv/t-elf | 1 + 2 files changed, 365 insertions(+) create mode

[PATCH v4] RISC-V: Implement TARGET_CAN_INLINE_P

Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V ISA. As a result, certain functions cannot be optimized with inlining when specific options, such as __attribute__((target("arch=+v"))) . This can lead to potential performance issues when building retargetable binaries for RISC-V. T

[PATCH v3] RISC-V: Implement TARGET_CAN_INLINE_P

ARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P. Signed-off-by: Yangyu Chen --- gcc/common/config/riscv/riscv-common.cc | 372 +--- gcc/config/riscv/riscv-subset.h | 3 + gcc/config/riscv/riscv.cc | 66 + 3 files changed, 276 insertions(+), 165 deletio

[PATCH v2] RISC-V: Implement TARGET_CAN_INLINE_P

ARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P. Signed-off-by: Yangyu Chen --- gcc/common/config/riscv/riscv-common.cc | 370 +--- gcc/config/riscv/riscv-subset.h | 3 + gcc/config/riscv/riscv.cc | 59 3 files changed, 267 insertions(+), 165 deletio

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

> On Sep 30, 2024, at 13:58, Kito Cheng wrote: > > Hi Yang-Yu: > >> >> Specially, we can reproduce the result on BananaPi-F3 Hardware: >> >> Use this GCC branch with my patch: >> https://github.com/cyyself/gcc/tree/rv_can_inline >> >> And compile the coremark on this branch: >> https://git

Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

that relies on target_clone support on RISC-V, so I want a working target_clone GCC to work and want to devote my time to it. Thanks, Yangyu Chen > > On Sun, Sep 29, 2024 at 11:20 PM Jeff Law wrote: >> >> >> >> On 9/29/24 3:16 AM, Yangyu Chen wrot

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

> On Sep 30, 2024, at 10:34, Yangyu Chen wrote: >> >> >> On Sep 30, 2024, at 02:49, Jeff Law wrote: >> On 9/9/24 6:11 AM, Yangyu Chen wrote: >>> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V >>> ISA. As a result, certain functio

Re: [PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

> On Sep 30, 2024, at 02:49, Jeff Law wrote: > > > > On 9/9/24 6:11 AM, Yangyu Chen wrote: >> Currently, we lack support for TARGET_CAN_INLINE_P on the RISC-V >> ISA. As a result, certain functions cannot be optimized with inlining >> when specific optio

Re: [PATCH v4] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

Good job. I'm currently working on RISC-V target_clone and target_versions support in GCC and found this patch is needed as my prerequisite. However, I found this tagged as "dropped" on Patchwork. What happened?

[PATCH] hosthooks.h: Fix GCC_HOST_HOOKS_H typo

The comment of the final endif in hosthooks.h is wrong, it should be GCC_HOST_HOOKS_H instead of GCC_LANG_HOOKS_H. gcc/ChangeLog: * hosthooks.h (struct host_hooks): Fix GCC_HOST_HOOKS_H typo. Signed-off-by: Yangyu Chen --- gcc/hosthooks.h | 2 +- 1 file changed, 1 insertion(+), 1

Re: [RFC PATCH] Allow functions with target_clones attribute to be inlined

> On Sep 18, 2024, at 23:36, Andrew Carlotti wrote: > > On Wed, Sep 18, 2024 at 09:46:15AM +0100, Richard Sandiford wrote: >> Yangyu Chen writes: >>> I recently found that target_clones functions cannot inline even when >>> the caller has exactly the sam

Re: [RFC PATCH] Allow functions with target_clones attribute to be inlined

> On Sep 18, 2024, at 16:46, Richard Sandiford > wrote: > > Yangyu Chen writes: >> I recently found that target_clones functions cannot inline even when >> the caller has exactly the same target. However, if we only use target >> attributes in C++ and let the

[RFC PATCH] Allow functions with target_clones attribute to be inlined

ute): Allow functions with target_clones attribute to be inlined. gcc/d/ChangeLog: * d-attribs.cc (d_handle_target_clones_attribute): Allow functions with target_clones attribute to be inlined. Signed-off-by: Yangyu Chen --- gcc/ada/gcc-interface/utils.cc | 5 + gcc/c-family/

[PATCH] RISC-V: Implement TARGET_CAN_INLINE_P

ons when there is no always_inline set. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_can_inline_p): New function. (TARGET_CAN_INLINE_P): Implement TARGET_CAN_INLINE_P. Signed-off-by: Yangyu Chen --- gcc/config/riscv/riscv.cc | 135 ++ 1 file cha

[PATCH] RISC-V: Fix wrong tune parameters on int_div

ned-off-by: Yangyu Chen --- gcc/config/riscv/riscv.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index f2dcb0db6fb..ca9a2ca81d5 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -346,7 +346,7