Hi Tom,
On 8 July 2014 20:45, Tom de Vries tom_devr...@mentor.com wrote:
On 01-07-14 19:26, Jeff Law wrote:
On 07/01/14 09:51, Yufeng Zhang wrote:
Hi,
This patch resolves a conflict between the aapcs64 test framework for
func-ret tests and the optimization option -fuse-caller-save, which
Hi,
This patch resolves a conflict between the aapcs64 test framework for
func-ret tests and the optimization option -fuse-caller-save, which was
enabled by default at -O1 or above recently.
Basically, the test framework has an inline-assembly based mechanism in
place which invokes the test
Looks good to me. Thanks for the fix.
Yufeng
On 06/30/14 10:44, Gerald Pfeifer wrote:
I applied the small patch on top of this, mostly triggered by the
markup issue.
Let me know if there is anything you'd like to see differently; I
am thinking to push back to GCC 4.9 as well later.
Gerald
On 27 June 2014 16:32, Tejas Belagod tbela...@arm.com wrote:
2014-06-23 Tejas Belagod tejas.bela...@arm.com
diff --git a/gcc/config/aarch64/aarch64-simd-builtin-types.def
b/gcc/config/aarch64/aarch64-simd-builtin-types.def
new file mode 100644
index 000..aa6a84e
--- /dev/null
+++
On 23 June 2014 16:47, Tejas Belagod tbela...@arm.com wrote:
Hi,
Here is a patch that restructures neon builtins to use vector types based on
standard base types. We previously defined arm_neon.h's neon vector
types(int8x8_t) using gcc's front-end vector extensions. We now move away
from
Ping~
Original posted here:
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg01492.html
Thanks,
Yufeng
On 06/18/14 17:35, Yufeng Zhang wrote:
This time with patch... Apologize.
Yufeng
On 06/18/14 17:31, Yufeng Zhang wrote:
Hi,
This patch improves the code-gen of -marm in the case of two
Hi,
This patch updates a number of aapcs64 tests to make them big-endian
friendly. Changes are mainly:
* checking the W regs instead of X regs for integral arguments less than
8 bytes
* correcting the corresponding stack location checks in big-endian mode
With this patch, make check-gcc
Hi,
This improves the robustness of the aapcs64 test framework for testing
function return ABI rules. It ensures the test facility functions now
able to see the exact content of return registers right at the moment
when a function returns.
OK for trunk?
Thanks,
Yufeng
gcc/testsuite
Hi,
This patch improves the code-gen of -marm in the case of two-dimensional
array access.
Given the following code:
typedef struct { int x,y,a,b; } X;
int
f7a(X p[][4], int x, int y)
{
return p[x][y].a;
}
The code-gen on -O2 -marm -mcpu=cortex-a15 is currently
mov r2, r2,
This time with patch... Apologize.
Yufeng
On 06/18/14 17:31, Yufeng Zhang wrote:
Hi,
This patch improves the code-gen of -marm in the case of two-dimensional
array access.
Given the following code:
typedef struct { int x,y,a,b; } X;
int
f7a(X p[][4], int x, int y)
{
return p[x][y
Hi,
The patch fixes a bug in the AArch64 backend in calculating the
beginning address of the unnamed incoming arguments on the stack, i.e.
the initial value of __va_list-__stack. aarch64_layout_arg incorrectly
calculates the size of named arguments on stack using the number of
registers
Hi Honza,
I can confirm that with your commit r211045 the
arm-none-linux-gnueabi{hf} builds are OK now. Thanks for the fix.
Yufeng
On 05/28/14 22:56, Jan Hubicka wrote:
Any update?
I've managed to generate a simple test case from
libstdc++-v3/src/c++98/strstream.cc which reproduces the
The patch also fixes the arm-none-eabi build failures I've seen.
Thanks,
Yufeng
On 05/27/14 16:07, Richard Sandiford wrote:
Richard Sandifordrdsandif...@googlemail.com writes:
Richard Sandifordrsand...@linux.vnet.ibm.com writes:
Does the following patch help?
Bah, it won't of course: %i1
On 05/27/14 23:20, Jan Hubicka wrote:
here we have decl and its local alias:
(gdb) p debug_tree (sect-named.decl)
var_decl 70f7d060 _ZTCSt14basic_ifstreamIcSt11char_traitsIcEE0_Si
typearray_type 70dd8840
typepointer_type 700f5840 __vtbl_ptr_type typefunction_type 700f57e0
Ping^2
Thanks,
Yufeng
On 05/08/14 17:38, Yufeng Zhang wrote:
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-05/msg00019.html
Thanks,
Yufeng
On 05/01/14 17:57, Yufeng Zhang wrote:
Hi,
This patch documents issues with singleton vector types in the 4.9
AArch64 backend
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-05/msg00019.html
Thanks,
Yufeng
On 05/01/14 17:57, Yufeng Zhang wrote:
Hi,
This patch documents issues with singleton vector types in the 4.9
AArch64 backend.
On AArch64, the singleton vector types int64x1_t, uint64x1_t
On 05/02/14 10:08, Kugan wrote:
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 347a94a..8bd13f3 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -9107,6 +9107,7 @@ to those machines. Generally these generate calls to
specific machine
instructions, but allow the
Hi,
This patch documents issues with singleton vector types in the 4.9
AArch64 backend.
On AArch64, the singleton vector types int64x1_t, uint64x1_t and
float64x1_t exported by arm_neon.h are defined to be the same as their
base types. This results in incorrect application of parameter
Ping~
OK for stage-1?
The original patch was posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00286.html
and the glibc patch was approved here:
http://sourceware.org/ml/libc-alpha/2014-01/msg00120.html
Thanks,
Yufeng
On 01/07/14 16:34, Yufeng Zhang wrote:
Hi,
This patch
Thanks. Patch has been committed to the trunk. Is it OK for
gcc-4_9-branch?
Thanks,
Yufeng
On 04/14/14 10:36, Richard Earnshaw wrote:
On 13/04/14 15:30, Gerald Pfeifer wrote:
On Fri, 11 Apr 2014, Yufeng Zhang wrote:
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-03
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-03/msg01282.html
Thanks,
Yufeng
On 03/24/14 17:45, Yufeng Zhang wrote:
Hi,
-free has been enabled by default for -O2 and above on AArch64 a while
ago. This patch updates the relevant part of user manual to reflect the
fact
Ping~
Possible for stage-4 as a bug-fix?
Thanks,
Yufeng
On 02/24/14 14:05, Yufeng Zhang wrote:
Hi Marcus,
On 01/14/14 12:30, Marcus Shawcroft wrote:
On 6 January 2014 12:30, Yufeng Zhangyufeng.zh...@arm.com wrote:
This patch fixes the implementation of vcvtmd_s64_f64 and vcvtpd_s64_f64
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01673.html
Thanks,
Yufeng
On 02/28/14 17:44, Yufeng Zhang wrote:
Hi,
The attached patch fixes a bug in ./src/aarch64/sysv.S:ffi_closure_SYSV
where stack unwinding information was not generated correctly. The
change
/atgreen/libffi
2014-02-28 Yufeng Zhang yufeng.zh...@arm.com
* src/aarch64/sysv.S (ffi_closure_SYSV): Use x29 as the
main CFA reg; update cfi_rel_offset.diff --git a/libffi/src/aarch64/sysv.S b/libffi/src/aarch64/sysv.S
index b8cd421..ffb16f8 100644
--- a/libffi/src/aarch64/sysv.S
Hi,
On 02/26/14 02:25, Andrew Pinski wrote:
Hi,
With ILP32, some simple usage of TLS variables causes an unrecognizable
instruction due to needing to use SImode for loading pointers from memory.
This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
support SImode for
On 02/26/14 02:25, Andrew Pinski wrote:
Hi,
This is the final patch which adds support for the dynamic linker and
multi-lib directories for ILP32. I did not change multi-arch support as
I did not know what it should be changed to and internally here at Cavium,
we don't use multi-arch.
On 02/25/14 01:23, Andrew Pinski wrote:
On Wed, Dec 4, 2013 at 10:12 AM, Yufeng Zhangyufeng.zh...@arm.com wrote:
On 12/03/13 21:24, Andrew Pinski wrote:
[snip]
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 313517f..08fcc94 100644
---
Hi Marcus,
On 01/14/14 12:30, Marcus Shawcroft wrote:
On 6 January 2014 12:30, Yufeng Zhangyufeng.zh...@arm.com wrote:
This patch fixes the implementation of vcvtmd_s64_f64 and vcvtpd_s64_f64 in
arm_neon.h to use llfloor and llceil instead, which are ILP32-friendly.
This patch will fix the
Ping^3~~~
Is there a way in getting attention from libffi maintainers? I really
would like to see the patch made into gcc before the stage 4 closes.
Thanks,
Yufeng
On 02/12/14 18:08, Yufeng Zhang wrote:
Ping^2~~
Thanks,
Yufeng
On 01/14/14 12:10, Yufeng Zhang wrote:
Ping~
Originally
Hi Michael,
Thanks for the fix. The patch looks OK to me in general, although I
have some minor comments below.
On 01/17/14 08:22, Michael Hudson-Doyle wrote:
Hi, as discussed inhttp://gcc.gnu.org/bugzilla/show_bug.cgi?id=59799
GCC currently gets a detail of the AArch64 ABI wrong: arrays
Hi,
g++.dg/debug/ra1.C fails on arm-none-eabi with the following message
because enum types in arm eabi are represented by the smallest integral
type:
warning: width of 'tree_base::code' exceeds its type [enabled by default]
This patch updates the test by changing the width of the 'code'
Ping~
Originally posted here:
http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00185.html
Thanks,
Yufeng
On 01/06/14 12:30, Yufeng Zhang wrote:
This patch fixes the implementation of vcvtmd_s64_f64 and vcvtpd_s64_f64
in arm_neon.h to use llfloor and llceil instead, which are ILP32-friendly
Hi,
This patch and the preceding aarch64.md patches all look good to me, but
I cannot approve it.
Thanks for adding the support for these missing patterns and defines!
Yufeng
On 01/08/14 18:13, Richard Henderson wrote:
We have good support for TImode arithmetic, so no need to do anything
Hi,
The patch fixes an ICE in gcc/config/arm/arm.c:arm_expand_neon_args ().
When the destination address for vst1q_lane_u64 is not aligned,
calling expand_normal will get a REG, which is not expected by
arm_expand_neon_args, resulting in an assertion failure. Now, call
expand_expr with
Hi,
This patch is to sync up include/longlong.h with its glibc peer after
the proposed change here:
http://sourceware.org/ml/libc-alpha/2014-01/msg00114.html
The patch defines a number of macros in stdlib/longlong.h to use GCC
builtins __builtin_clz* to implement the __clz* and __ctz*
This patch fixes the implementation of vcvtmd_s64_f64 and vcvtpd_s64_f64
in arm_neon.h to use llfloor and llceil instead, which are ILP32-friendly.
This patch will fix the following test failure in the ILP32 mode:
FAIL: gcc.target/aarch64/vect-vcvt.c scan-assembler fcvtms\\tx[0-9]+,
d[0-9]+
Many thanks for your effort in fixing the issue. I can confirm that the
new tests pass on arm-eabi using qemu as the simulator.
Thanks,
Yufeng
P.s. Wish you have nice holiday break and happy new year!
On 12/20/13 01:12, Hans-Peter Nilsson wrote:
Here's a patch that splits up
On 12/16/13 04:22, Hans-Peter Nilsson wrote:
From: Hans-Peter Nilssonh...@axis.com
Date: Sun, 15 Dec 2013 15:20:48 +0100
+// { dg-options -std=gnu++0x -DSAMPLES=3 { target { { arm*-* }
simulator } } }
+// { dg-options -std=gnu++0x -DSAMPLES=1 { target simulator } }
JFTR, I managed
Hi Kugan,
The latest patch looks good to me; I only have a couple of minor
comments inlined below. Please ask Marcus to review and approve it.
Thanks again for fixing this issue!
On 12/10/13 06:21, Kugan wrote:
[snip]
Updated it and tested with
1. binutils 2.23.2
a. bootstrapped with
On 12/03/13 21:24, Andrew Pinski wrote:
Hi,
This is the final patch which adds support for the dynamic linker and
multi-lib directories for ILP32. I did not change multi-arch support as
I did not know what it should be changed to and internally here at Cavium,
we don't use multi-arch.
OK?
Hi Kugan,
Thanks for the quick action.
On 12/09/13 11:20, Kugan wrote:
Thanks Yufeng for the review.
On 07/12/13 03:18, Yufeng Zhang wrote:
gcc trunk aarch64 bootstrapping fails with gas version 2.23.2 (with
error message similar to cannot compute suffix of object files
Hi Kugan,
Thanks for working on this issue.
On 12/04/13 21:03, Kugan wrote:
Hi,
gcc trunk aarch64 bootstrapping fails with gas version 2.23.2 (with
error message similar to cannot compute suffix of object files) as this
particular version does not support -mabi=lp64. It succeeds with later
:20, Richard Biener wrote:
On Tue, Dec 3, 2013 at 1:50 PM, Yufeng Zhangyufeng.zh...@arm.com
wrote:
On 12/03/13 06:48, Jeff Law wrote:
On 12/02/13 08:47, Yufeng Zhang wrote:
Ping~
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg03360.html
Thanks,
Yufeng
On 11/26/13 15:02, Yufeng Zhang wrote
On 12/05/13 13:21, Bill Schmidt wrote:
On Thu, 2013-12-05 at 12:02 +, Yufeng Zhang wrote:
On 12/04/13 13:08, Bill Schmidt wrote:
On Wed, 2013-12-04 at 11:26 +0100, Richard Biener wrote:
[snip]
I'm not sure what you're suggesting that he use get_inner_reference on
at this point
...@arm.com wrote:
On 12/03/13 14:20, Richard Biener wrote:
On Tue, Dec 3, 2013 at 1:50 PM, Yufeng Zhangyufeng.zh...@arm.com
wrote:
On 12/03/13 06:48, Jeff Law wrote:
On 12/02/13 08:47, Yufeng Zhang wrote:
Ping~
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg03360.html
Thanks,
Yufeng
On 11/26
Looks good to me, but I cannot approve it.
Yufeng
On 12/03/13 21:24, Andrew Pinski wrote:
Hi,
The arguments to --with-multilib-list for AARCH64 are exclusive but
currently is being treated as ones which are not. This causes problems in that
we get four library sets with
I think together with this patch, the default value for
--with-multilib-list when it is absent can be updated to lp64,ilp32
from lp64 only. This will make the multi-lib default setting on
aarch64*-*-linux* consist that on aarch64*-*-elf. See gcc/config.gcc.
Thanks,
Yufeng
P.S. Copypaste
On 12/03/13 21:24, Andrew Pinski wrote:
Hi,
With ILP32 AARCH64, Pmode (DImode) != ptrmode (SImode) so the variable decl
has a mode of SImode while the register is DImode. So the target that gets
passed down to expand_builtin_thread_pointer is NULL as expand does not
know how to get a subreg
On 12/03/13 21:24, Andrew Pinski wrote:
Hi,
With ILP32, some simple usage of TLS variables causes an unrecognizable
instruction due to needing to use SImode for loading pointers from memory.
This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
support SImode for
On 12/03/13 06:48, Jeff Law wrote:
On 12/02/13 08:47, Yufeng Zhang wrote:
Ping~
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg03360.html
Thanks,
Yufeng
On 11/26/13 15:02, Yufeng Zhang wrote:
On 11/26/13 12:45, Richard Biener wrote:
On Thu, Nov 14, 2013 at 12:25 AM, Yufeng
Zhangyufeng.zh
On 12/03/13 14:20, Richard Biener wrote:
On Tue, Dec 3, 2013 at 1:50 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
On 12/03/13 06:48, Jeff Law wrote:
On 12/02/13 08:47, Yufeng Zhang wrote:
Ping~
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg03360.html
Thanks,
Yufeng
On 11/26/13 15:02
On 12/03/13 20:35, Richard Biener wrote:
Yufeng Zhangyufeng.zh...@arm.com wrote:
On 12/03/13 14:20, Richard Biener wrote:
On Tue, Dec 3, 2013 at 1:50 PM, Yufeng Zhangyufeng.zh...@arm.com
wrote:
On 12/03/13 06:48, Jeff Law wrote:
On 12/02/13 08:47, Yufeng Zhang wrote:
Ping~
http
Ping~
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg03360.html
Thanks,
Yufeng
On 11/26/13 15:02, Yufeng Zhang wrote:
On 11/26/13 12:45, Richard Biener wrote:
On Thu, Nov 14, 2013 at 12:25 AM, Yufeng Zhangyufeng.zh...@arm.com wrote:
On 11/13/13 20:54, Bill Schmidt wrote:
The second version
On 11/29/13 07:52, Bin.Cheng wrote:
On Thu, Nov 28, 2013 at 8:06 PM, Bin.Chengamker.ch...@gmail.com wrote:
On Thu, Nov 28, 2013 at 6:48 PM, Richard Earnshawrearn...@arm.com wrote:
On 18/09/13 10:15, bin.cheng wrote:
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org
On 11/29/13 12:02, Richard Biener wrote:
On Fri, Nov 29, 2013 at 12:46 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
On 11/29/13 07:52, Bin.Cheng wrote:
On Thu, Nov 28, 2013 at 8:06 PM, Bin.Chengamker.ch...@gmail.com wrote:
On Thu, Nov 28, 2013 at 6:48 PM, Richard Earnshawrearn...@arm.com
On 11/29/13 10:44, Richard Biener wrote:
On Fri, Nov 29, 2013 at 8:52 AM, Bin.Chengamker.ch...@gmail.com wrote:
On Thu, Nov 28, 2013 at 8:06 PM, Bin.Chengamker.ch...@gmail.com wrote:
On Thu, Nov 28, 2013 at 6:48 PM, Richard Earnshawrearn...@arm.com wrote:
On 18/09/13 10:15, bin.cheng
Ping^2
The patch was posted here:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01523.html
Thanks,
Yufeng
On 11/19/13 11:45, Yufeng Zhang wrote:
Hi Richard,
Can I get an approval or some feedback from you about the patch?
Regards,
Yufeng
On 11/13/13 23:25, Yufeng Zhang wrote:
On 11/13/13
Hi,
arm_legitimize_address forces immediates in PLUS to be in REG for no
good reason. This patch changes it not to do this.
With the immediate constants directly available in the RTL, it helps the
expand more effectively to fold and re-associate the immediates.
The change also helps the
On 11/26/13 12:45, Richard Biener wrote:
On Thu, Nov 14, 2013 at 12:25 AM, Yufeng Zhangyufeng.zh...@arm.com wrote:
Hi Bill,
On 11/13/13 20:54, Bill Schmidt wrote:
Hi Yufeng,
The second version of your original patch is ok with me with the
following changes. Sorry for the little side
Hi,
Currently the address legitimization (by calling
memory_address_addr_space) is carried out twice during the RTL expansion
of ARRAY_REF, COMPONENT_REF, etc. when their OFFSET is not NULL. It is
done once for the BASE and once for the summed address in
offset_address. This may cause part,
Thanks for the feedback, Richard. I'll do some experiment to see if I
can get the post-expansion validation work.
Regards,
Yufeng
On 11/22/13 13:48, Richard Biener wrote:
On Fri, Nov 22, 2013 at 2:00 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
Hi,
Currently the address legitimization (by
Hi Richard,
Can I get an approval or some feedback from you about the patch?
Regards,
Yufeng
On 11/13/13 23:25, Yufeng Zhang wrote:
On 11/13/13 20:54, Bill Schmidt wrote:
Hi Yufeng,
The second version of your original patch is ok with me with the
following changes.
Thanks a lot
Hi Bill,
On 11/13/13 18:04, Bill Schmidt wrote:
Hi Yufeng,
On Tue, 2013-11-12 at 22:34 +, Yufeng Zhang wrote:
Hi Bill,
Many thanks for the review.
I find your suggestion on using the next_interp field quite
enlightening. I prepared a patch which adds changes without modifying
Hi Bill,
On 11/13/13 20:54, Bill Schmidt wrote:
Hi Yufeng,
The second version of your original patch is ok with me with the
following changes. Sorry for the little side adventure into the
next-interp logic; in the end that's going to hurt more than it helps in
this case. Thanks for having a
in detail, but I think this should give you
enough to work with to re-design the idea to fit better with the
existing framework. Please let me know if you need more information, or
if you feel I've misunderstood something.
Thanks,
Bill
On Mon, 2013-11-04 at 18:41 +, Yufeng Zhang wrote:
Hi
On 11/05/13 10:13, bin.cheng wrote:
Index: gcc/tree-affine.c
===
--- gcc/tree-affine.c (revision 204117)
+++ gcc/tree-affine.c (working copy)
@@ -874,10 +874,11 @@ debug_aff (aff_tree *val)
fprintf (stderr, \n);
}
-/*
On 11/05/13 11:45, Bin.Cheng wrote:
On Tue, Nov 5, 2013 at 7:19 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
On 11/05/13 10:13, bin.cheng wrote:
Index: gcc/tree-affine.c
===
--- gcc/tree-affine.c (revision 204117)
+++
Hi,
This patch extends the slsr pass to optionally use an alternative base
expression in finding basis for CAND_REFs. Currently the pass uses
hash-based algorithm to match the base_expr in a candidate. Given a
test case like the following, slsr will not be able to recognize the two
On 10/30/13 14:46, Richard Biener wrote:
On Tue, Oct 29, 2013 at 10:18 AM, bin.chengbin.ch...@arm.com wrote:
Hi,
I noticed that IVOPT generates complex address expressions like below for iv
base.
arr_base[0].y
arr[0]
MEM[p+o]
It's even worse for targets support
On 10/24/13 01:29, Richard Henderson wrote:
On 10/21/2013 03:01 PM, Yufeng Zhang wrote:
This patch changes the widening_mul pass to fuse the widening multiply with
accumulate only when the multiply has single use. The widening_mul pass
currently does the conversion regardless of the number
Hi,
Thank you both for the reviewing. I've updated the patch and also added
a test (to the gcc.dg to avoid duplication). I'll commit the patch shortly.
Thanks,
Yufeng
gcc/
* tree-ssa-math-opts.c (convert_plusminus_to_widen): Call
has_single_use () and not do the conversion
Hi,
This patch changes the widening_mul pass to fuse the widening multiply
with accumulate only when the multiply has single use. The widening_mul
pass currently does the conversion regardless of the number of the uses,
which can cause poor code-gen in cases like the following:
typedef int
On 10/02/13 02:21, Bill Schmidt wrote:
On Tue, 2013-10-01 at 23:57 +0100, Yufeng Zhang wrote:
On 10/01/13 20:55, Bill Schmidt wrote:
On Tue, 2013-10-01 at 11:56 -0500, Bill Schmidt wrote:
OK, thanks. The problem that you've encountered is that you are
attempting to do something illegal
On 10/02/13 13:40, Bill Schmidt wrote:
On Tue, 2013-10-01 at 20:21 -0500, Bill Schmidt wrote:
On Tue, 2013-10-01 at 23:57 +0100, Yufeng Zhang wrote:
On 10/01/13 20:55, Bill Schmidt wrote:
On Tue, 2013-10-01 at 11:56 -0500, Bill Schmidt wrote:
OK, thanks. The problem that you've
Ping~
Thanks,
Yufeng
On 09/25/13 12:37, Yufeng Zhang wrote:
Hello,
Please find the updated version of the patch in the attachment. It has
addressed the previous comments and also included some changes in order
to pass the bootstrapping on x86_64.
It's also passed the regtest on arm-none
Hi Bill,
Thank you for the review and the offer to help.
On 10/01/13 15:36, Bill Schmidt wrote:
On Tue, 2013-10-01 at 08:17 -0500, Bill Schmidt wrote:
On Tue, 2013-10-01 at 12:19 +0200, Richard Biener wrote:
On Wed, Sep 25, 2013 at 1:37 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
Hello,
On 10/01/13 20:55, Bill Schmidt wrote:
On Tue, 2013-10-01 at 11:56 -0500, Bill Schmidt wrote:
OK, thanks. The problem that you've encountered is that you are
attempting to do something illegal. ;) (Bin's original patch is
actually to blame for that, as well as me for not catching it then.)
Hello,
Please find the updated version of the patch in the attachment. It has
addressed the previous comments and also included some changes in order
to pass the bootstrapping on x86_64.
It's also passed the regtest on arm-none-eabi and aarch64-none-elf.
It will also fix the test failure
On 09/18/13 02:26, bin.cheng wrote:
-Original Message-
From: Dominique Dhumieres [mailto:domi...@lps.ens.fr]
Sent: Wednesday, September 18, 2013 1:47 AM
To: gcc-patches@gcc.gnu.org
Cc: hjl.to...@gmail.com; Bin Cheng
Subject: Re: [PATCH GCC]Catch more MEM_REFs sharing common
addressing
On 09/23/13 07:58, Zhenqiang Chen wrote:
--- clean-trunk/gcc/config/arm/arm.c2013-09-17 14:29:45.632457018 +0800
+++ pr58423/gcc/config/arm/arm.c2013-09-18 14:34:24.708892318 +0800
@@ -17645,8 +17645,8 @@
mem = gen_frame_mem (DImode, stack_pointer_rtx);
tmp
Ping~
Thanks,
Yufeng
http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00774.html
On 09/10/13 18:12, Yufeng Zhang wrote:
Oops, now attach the correct patch and change log.
Thanks,
Yufeng
gcc/
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args):
Call
On 09/18/13 11:21, Andreas Schwab wrote:
Yufeng Zhangyufeng.zh...@arm.com writes:
(ASM_SPEC): Update to also substitute -mabi.
You should check that the assembler actually understands that option.
Currently it is impossible to build an aarch64-linux compiler with
binutils from the
Hi,
Following Bin's patch in
http://gcc.gnu.org/ml/gcc-patches/2013-09/msg00695.html, this patch
tweaks backtrace_base_for_ref () to strip of any widening conversion
after the first TREE_CODE check fails. Without this patch, the test
(gcc.dg/tree-ssa/slsr-39.c) in Bin's patch will fail on
Oops, now attach the correct patch and change log.
Thanks,
Yufeng
gcc/
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args):
Call aarch64_simd_expand_args to update op[argc].
On 09/10/13 18:08, Yufeng Zhang wrote:
This patch fixes a number of test failures
This patch fixes a number of test failures in gcc.target/aarch64/v*.c in
ILP32.
The corresponding RTL patterns for some load/store builtins have Pmode
(i.e. DImode) specified for their address operands. However, coming
from a pointer-typed function argument, op[argc] will have SImode in
Hi,
This patch adds the support for the crc extension option to the aarch64
gcc driver.
OK for the trunk?
Thanks,
Yufeng
gcc/
* config/aarch64/aarch64-option-extensions.def: Add
AARCH64_OPT_EXTENSION of 'crc'.
* config/aarch64/aarch64.h (AARCH64_FL_CRC): New define.
, Yufeng Zhang wrote:
Ping^3~
Thanks,
Yufeng
On 07/08/13 11:11, Yufeng Zhang wrote:
Ping^2~
Thanks,
Yufeng
On 07/02/13 23:44, Yufeng Zhang wrote:
Ping~
Can I get an OK please if there is no objection?
Regards,
Yufeng
On 06/26/13 23:39, Yufeng Zhang wrote:
This patch updates
Ping~
Thanks,
Yufeng
On 07/26/13 12:06, Yufeng Zhang wrote:
Hi,
This patch changes to skip gcc.dg/lower-subreg-1.c for aarch64*-*-*.
The word mode in aarch64 is 64-bit so the lower-subreg pass won't happen
in this test case. The test is currently skipped on aarch64 with lp64
due
Hi,
This patch changes to skip gcc.dg/lower-subreg-1.c for aarch64*-*-*.
The word mode in aarch64 is 64-bit so the lower-subreg pass won't happen
in this test case. The test is currently skipped on aarch64 with lp64
due to the directive of dg-require-effective-target ilp32, but fails
when
Ping^2~
Thanks,
Yufeng
On 07/02/13 23:44, Yufeng Zhang wrote:
Ping~
Can I get an OK please if there is no objection?
Regards,
Yufeng
On 06/26/13 23:39, Yufeng Zhang wrote:
This patch updates assign_parm_find_data_types to assign passed_mode and
nominal_mode with the mode of the built
Hi,
This patch adds support for the register wsp; in ILP32, this is
necessary in order to support the global register variable associated
the stack pointer with the syntax asm (wsp); it is used in libgloss to
get the stack pointer.
OK for the trunk?
Thanks,
Yufeng
gcc/
*
This patch removes unused types and variables claimed to handle abi
types in aarch64.
OK for the trunk?
Thanks,
Yufeng
gcc/
* config/aarch64/aarch64.h (enum arm_abi_type): Remove.
(ARM_ABI_AAPCS64): Ditto.
(arm_abi): Ditto.
(ARM_DEFAULT_ABI): Ditto.diff --git
Hi Andrew,
Please find the updated patch in the attachment that addresses your
comments.
It now builds both ilp32 and lp64 multilibs by default, with the
--with-multilib-list support remaining to provide options to turn off
one of them.
-mabi=ilp32 and -mabi=lp64 are now the command line
Ping~
Can I get an OK please if there is no objection?
Regards,
Yufeng
On 06/26/13 23:39, Yufeng Zhang wrote:
This patch updates assign_parm_find_data_types to assign passed_mode and
nominal_mode with the mode of the built pointer type instead of the
hard-coded Pmode in the case of pass
Hi Andrew,
Thank you for your review. I'm currently testing an updated patch and
will send it for further review early next week.
Regards,
Yufeng
On 06/26/13 23:59, Andrew Pinski wrote:
On Wed, Jun 26, 2013 at 3:33 PM, Yufeng Zhangyufeng.zh...@arm.com wrote:
This patch adds the
On 06/27/13 20:28, Joseph S. Myers wrote:
On Thu, 27 Jun 2013, Yufeng Zhang wrote:
We need a reliable way to tell we are compiling for ILP32. On one hand LLP64
support may be added in the future; on the other hand, not all AArch64
If thinking of adding a third ABI, that suggests you should
This patch fixes the bug that pointer-typed argument passed on stack is
not padded properly in ILP32.
OK for the trunk?
Thanks,
Yufeng
gcc/
* config/aarch64/aarch64.c (aarch64_pad_arg_upward): In big-endian,
pad pointer-typed argument downward.
gcc/testsuite/
*
On 06/27/13 01:56, Joseph S. Myers wrote:
On Wed, 26 Jun 2013, Yufeng Zhang wrote:
This patch defines _ILP32 and __ILP32__ for the AArch64 port when the ILP32
ABI is in use.
This helps libraries, e.g. libgloss and glibc, recognize which model is being
compiled.
GCC already defines _LP64
Hi,
A set of five patches will be sent shortly as the gcc part of changes
that add support for ILP32 in the AArch64 baremetal toolchain.
The five patches will be organized as the following:
1. Configury changes;
2. AArch64 backend changes that add necessary instruction patterns and
update
This patch adds the configuration changes to the AArch64 GCC to support:
* -milp32 and -mlp64 options in the compiler and the driver
* multilib of ilp32 and/or lp64 libraries
* differentiation of basic types in the compiler backend
The patch enables --with-multilib-list configuration option for
1 - 100 of 132 matches
Mail list logo
