fact it is only an input.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
2015-04-14 Nick Clifton
* config/rl78/rl78.c (rl78_expand_prologue): Mark large stack
decrement instruction as being frame related.
(rl78_print_operand_1
Nick
gcc/ChangeLog
2015-04-15 Nick Clifton
* config/rx/rx.opt (mallow-string-insns): New option.
* config/rx/rx.c (RX_BUILTIN_RMPA): Disable the use of this
builtin if string instructions are denied.
* config/rx/rx.h (TARGET_CPU_CPP_BUILTINS): Define
with those patterns.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-04-15 Nick Clifton
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and
MUL_UNINIT.
(enum rl78_cpu_type): New.
* config/rl78
Hi Guys,
I am applying the patch below as an obvious fix for come compile time
warning messages building the rl78 toolchain.
Cheers
Nick
gcc/ChangeLog
2015-04-23 Nick Clifton
* config/rl78/rl78.c (rl78_preferred_reload_class): Add
ATTRIBUTE_UNUSED to x parameter
?
Cheers
Nick
2015-01-26 Nick Clifton
* config/rl78/rl78.c (rl78_expand_prologue): In G10 mode push the
BC, DE and HL registers directly, not via AX.
When decrementing the stack pointer by a large amount, transfer SP
into AX and perform the subtraction there
toolchain with no regressions.
OK to apply ?
Cheers
Nick
2015-01-26 Nick Clifton
* config/rl78/cmpsi2.S: Use function start and end macros.
(__gcc_bcmp): New function.
* config/rl78/lshrsi3.S: Use function start and end macros.
* config/rl78/mulsi3.S: Add
fixes using an rl78-elf
toolchain.
OK to apply ?
Cheers
Nick
libgcc/ChangeLog
2015-02-04 Nick Clifton
* config/rl78/fpmath-sf.S (__addsf3): Add code for the special
case where rounding the fraction up results in an overflow
into unused bits.
gcc/ChangeLog
2015
Hi Guys,
I am applying the patch below to extend the MSP430 port of gcc's
auto-recognition of F5 multiply hardware enabled MCUs.
Cheers
Nick
gcc/ChangeLog
2015-02-04 Nick Clifton
* config/msp430/msp430.c (msp430_use_f5_series_hwmult): Add more
prefixes of kno
Hi Guys,
I am checking in the patch below to add SUBREG to the list of rtx
codes accepted by the di_operand and nonimmediate_di_operand
predicates in the FR30 backend. This should resolve PR 64408.
Cheers
Nick
gcc/ChangeLog
2015-02-04 Nick Clifton
PR target/64408
Hi Guys,
I am applying the patch below to update the V850 backend so that it
will pass on the -msoft-float and -mhard-float options to the
assembler. This matches up with a recent update to the assembler that
accepts these options.
Cheers
Nick
gcc/ChangeLog
2015-02-24 Nick Clifton
w use the "R" and "v" register constraints.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-03-03 Nick Clifton
* config/rl78/rl78.h (enum reg_class): Remove real registers from
General register class.
operations.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-03-03 Nick Clifton
* config/rl78/rl78.md (muladdhi4): New splitter.
Index: gcc/config/rl78/rl78.md
Hi Guys,
The patch below updates the 20101011-1.c test in the gcc testsuite to
add a few more targets whose (simulated) runtime does not support
trapping on division by zero.
OK to apply ?
Cheers
Nick
gcc/testsuite/ChangeLog
2015-03-12 Nick Clifton
* gcc.c-torture/execute
does will still remain valid.
What do people think ? Is this the right approach ?
I have tested the patch with an rl78-elf toolchain as well as an
x86_64-pc-linux-gnu toolchain and there were no regressions in the gcc
testsuite for either of these targets.
Cheers
Nick
Index: gcc/e
/cleanup-[12|13|5].c). It also adds some
new tests the MSP430 specific section of the gcc testsuite that check
the behaviour of the multiply functions for all possible variations oh
hardware multiply support.
Cheers
Nick
[*] There is an exception to the all-files-call-software-multiply rule
?
Cheers
Nick
PS: Running the libiberty testsuite with -fsanitize=undefined does throw
up a couple more runtime errors:
libiberty/cplus-dem.c:503:13: runtime error: signed integer overflow: 922337203
* 10 cannot be represented in type 'int'
libiberty/cp-demangle.c:4123:40: runtime error
against a real __fread_chk function. A dummy will do.
Hence I would like to apply the patch below. This patch resolves
unexpected failures of the pr61886_0.c test on targets like spu-elf
and sparc64-elf.
Cheers
Nick
gcc/testsuite/ChangeLog
2015-12-18 Nick Clifton
PR 68913
no regressions on an x86_64-pc-linux-gnu toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-12-18 Nick Clifton
* config/i386/i386.c (ix86_get_builtin_type): Use SFmode variant
of DFmode vector types when -fshort-doubles is enabled.
Index: gcc/config/i386/i386.c
ing a weak definition of __fread_chk should be
sufficient for those runtimes which do not provide their own definition.
At least that is my theory...
Cheers
Nick
ABI breaking option ?
I think the option should be simply removed...
Tempting - but we are in stage 3... My patch at least fixes the ICE for
now.
Cheers
Nick
fields. One field in particular - t_icode - is examined by
default_secondary_reload, and it was this that was triggering the
valgrind warning.
Tested with no regressions on a x86_64-pc-linux-gnu and a
powerpc64-le-linux-gnu toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-12-22
MAKE_DECL_ONE_ONLY using the COFF/PE weak symbol support now available
in gas and the linker. Doing this allows the test to pass.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-12-22 Nick Clifton
PR target/66655
* config/i386/cygming.h (MAKE_DECL_ONE_ONLY): Use weak symbol
support
Hi Guys,
I am applying the patch below to the MSP430 backend to add new
multilibs based upon the type of hardware multiply support used.
Cheers
Nick
gcc/ChangeLog
2015-05-29 Nick Clifton
* config/msp430/t-msp430 (MULTILIB_OPTIONS): Add multilibs for the
different types
interrupt handler if the handler never uses or corrupts the
frame pointer.
Tested with no regressions using an rx-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-06-02 Nick Clifton
* config/rl78/rl78-real.md: Add peepholes to avoid a register
copy when
to apply ?
Cheers
Nick
gcc/ChangeLog
2015-06-08 Nick Clifton
* config/rl78/rl78.c (rl78_select_section): With -mes0 put read
only data into the .frodata section.
Index: config/rl78/rl78.c
===
--- config/rl78/rl78
ernal compiler errors when the promoted type does not match the
original vector type.
Cheers
Nick
gcc/ChangeLog
2015-06-08 Nick Clifton
* config/rx/rx.c (rx_function_value): Do not promote vector types.
(rx_promote_function_mode): Likewise.
* config/rx/rx.h (LIBCALL_
ddress on the stack).
The patch below fixes the problem, although it could also be solved by
increasing the size of the a array when it is declared in main().
OK to apply ?
Cheers
Nick
gcc/testsuite/ChangeLog
2015-06-22 Nick Clifton
* gcc.dg/graphite/isl-ast-gen-if-1.
regressions on bfin-elf, ft32-elf, h8300-elf,
iq2000-elf, m32c-elf, mn10300-elf and v850-elf toolchains.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-06-23 Nick Clifton
* config/bfin/bfin.c (bfin_expand_prologue): Set
current_function_static_stack_size if
Hi Guys,
I am applying the patch below to fix a problem with the MSP430's
zero_extendhipsi2 pattern. When the destination is memory, four bytes
must be written, even though only a 20-bit value is being stored, as
otherwise the top nibble will be lost.
Cheers
Nick
gcc/ChangeLog
and the extension instructions, but also where the extra
hard registers are used for another purpose as well ?
Tested with no regressions (or fixes) on an x86-pc-linux-gnu target.
Also tested with no regression and 7 fixes on an rl78-elf target.
Cheers
Nick
gcc/ChangeLog
2015-11-18 Nick
that the extra hard registers are no used.
(This is certainly true for the RL78, where the (patched) optimization
does improve code, even though the widening does use extra registers).
Cheers
Nick
certainly true for the RL78, where the (patched) optimization
does improve code, even though the widening does use extra registers).
Nick -- can you pass along your testcode?
Sure - this is for the RL78 toolchain. In theory the problem is
generic, but I have not tested other toolchains
.
Tested with no regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-05-05 Nick Clifton
* config/rl78/rl78.c (need_to_save): Save the frame pointer any
time that it is used.
Index: gcc/config/rl78/rl78.c
igh memory otherwise.
Three new function and data attributes have also been added - lower,
either and upper - which allow the programmer to explicitly state
which memory region an object should use.
Tested with no regressions and 77 less unexpected failures on an
msp430-elf toolchain.
Che
OK to apply ?
Cheers
Nick
Index: htdocs/gcc-5/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v
retrieving revision 1.120
diff -u -3 -p -r1.120 changes.html
--- htdocs/gcc-5/changes.html 1 May 2015 22:44:45
expected sections.
Tested with no regressions on an rl8-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-05-13 Nick Clifton
* config/rl78/rl78.c (rl78_select_section): Select the correct
default section based upon the category of the decl.
Index: gcc/config/rl78
in PR 66156.
Cheers
Nick
gcc/ChangeLog
2015-05-19 Nick Clifton
PR target/66156
* config/msp430/msp430.md (zero_extendhisi2): Add support for
separate source and destination registers.
Index: gcc/config/msp430/msp430.md
Hi Guys,
I am applying the patch below to enhance the RX backend so that it
will push and pop multiple groups of registers using the PUSHM and
POPM instructions, thus reducing code size and increasing
performance.
Cheers
Nick
gcc/ChangeLog
2015-05-28 Nick Clifton
* config
.base/advance.c:41 12 {movhi}
(nil))
which to me pretty clearly shows that "c" is being stored at R1+4.
Cheers
Nick
extract the low 16 bits
of a 20 bit pointer. Adding a simple pattern to the machine
description file fixes this.
Cheers
Nick
gcc/ChangeLog
2016-05-25 Nick Clifton
* config/msp430/msp430.c (msp430_attr): Produce an error if a
static interrupt handler is detected
ad.
I tried out the extended patch (attached) and it gave even better GDB
results for the MSP430 and still no regressions (GCC or GDB) for MSP430 or
x86_64.
Is this enough justification ?
Cheers
Nick
dwarf2out.c.patch.2
Description: Unix manual page
Hi Oleg,
> Sorry, but my original patch was buggy. There are two problems:
Thanks for your diligence in checking the patch.
> The attached patch fixes those issues.
> OK for trunk?
>
> Cheers,
> Oleg
>
> gcc/ChangeLog:
> * config/rx/rx.md (FETCHOP_NO_MINUS): New code iterator.
> (
.
Tested with no regressions on an msp430-elf toolchain.
Cheers
Nick
gcc/ChangeLog
2016-06-16 Nick Clifton
* config/msp430/msp430-opts.h (msp430_hwmult_types): Add
MSP430_HWMULT_ prefix to enum values.
(msp430_regions): Add MSP430_REGION_ prefix to enum values
ode generation, so I
added a fix to (silently) disable interworking if the target
architecture does not support Thumb instructions.
Any comments or criticisms before I apply the patch ?
Cheers
Nick
gcc/ChangeLog
2016-02-16 Nick Clifton
PR target/62554
PR target/69
Hi Guys,
I am checking in this patch to update the list of MSP430 devices
built in to the msp430 backend.
Cheers
Nick
gcc/ChangeLog
2016-02-17 Nick Clifton
* config/msp430/msp430.c (msp430_mcu_data): Sync with data from
TI's devices.csv file as of March 2016.
kewise, but don't ignore the mode.
> +(define_predicate "arm_comparison_operator_mode"
Please could you extend the comment here to reference the PR. That way
anyone reading this code who wonders why we need to have two versions of
the same predicate will be able understand what is happening.
Cheers
Nick
/show_bug.cgi?id=49899
This submission is an updated version of that patch, made against
the latest gcc sources. It still chooses to generate an error message
and disallow the conversion, which I hope is the correct action.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2016-02-17 Nick
ure how important v3 support is any more
(or support for any ARM architecture prior to v4t). Do you know of
anyone who still needs it ?
Cheers
Nick
ght to be for gcc-7. It just feels wrong
to have a patch to fix a known bug, but not to be able to apply it because
the bug has always existed...
Cheers
Nick
Hi Jeff,
> My inclination would be to defer to gcc-7. Richi, Jakub or Joseph, as
> release managers, would have the final say though.
It's OK. I will resubmit after gcc 6 branches.
Cheers
Nick
heers
Nick
gcc/ChangeLog
2016-03-01 Nick Clifton
* config.gcc (cr16-*-elf): Add newlib-stdint.h to tm_file.
Index: gcc/config.gcc
===
--- gcc/config.gcc (revision 233857)
+++ gcc/config.gcc (working copy)
@@ -1
OK to apply ?
Tested with an mep-elf toolchain.
Cheers
Nick
gcc/ChangeLog
2016-03-01 Nick Clifton
* config.gcc (mep-*-elf): Add newlib-stdint.h to tm_file.
Index: gcc/config.gcc
===
--- gcc/config.gcc (revision
Hi DJ,
> Ok.
Thanks - patch committed. (I know that you have now deprecated the MeP port,
but at least with this patch in place the toolchain can now be built if obsolete
targets are enabled).
Cheers
Nick
, but using a special value of 2 to do
so. Then when the second call occurs we can detect this case and
ensure that we do not set flag_omit_leaf_frame_pointer to false.
Tested with no regressions on an aarch64-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2016-03-04 Nick Clifton
d that made everything simple.
So attached is a revised patch with the missing second hunk restored and a
testcase added.
(Which I have checked and confirmed that it does fail without the patch and it
does pass
with the patch applied).
OK to apply ?
Cheers
Nick
gcc/ChangeLog as before...
#x27;s my bad and I'll propose a patch for it soon.
>
> I don't think I've seen this on list yet, it might be worth waiting until
> Kyrill has put this patch up before you commit.
I did this. Plus I checked to make sure that the patch still works and that
the new test passes...
Cheers
Nick
Hi Guys,
I am applying this patch as a further fix for PR 62254.
In the long run we will hopefully be dropping support for ARM v3 (and
earlier) so this is more in the nature of a plaster than a real fix.
Cheers
Nick
gcc/ChangeLog
2016-03-30 Nick Clifton
PR target/62254
ommon problem for all tests that use
additional source files, so I do not think that it is a big issue.
Tested with no regressions on an x86_64-pc-linux-gnu toolchain.
OK to apply ?
Cheers
Nick
gcc/testsuite/ChangeLog
2016-01-05 Nick Clifton
PR target/66655
* g++.dg/pr66
compiler with valgrind.
Actually I cheated - I initialised the unused field to 0xdeadbeef and
then checked for this in default_secondary-reload(). That way it only
took me 17 seconds in multidelta...
With a testcase, this is fine.
Thanks - committed. Testcase attached.
Cheers
Nick
gcc
the MDUC
registers will not be saved if the interrupt function does not use the
multiply hardware and does not call any other function.
Cheers
Nick
".cc" rather than .C. Can you give that a
quick whirl and see if that avoids having the additional file used as a
a test on its own?
Thanks - that worked. :-)
Revised test attached. OK to apply ?
Cheers
Nick
--- /dev/null 2016-01-07 09:30:14.144966933 +
+++ gcc/testsuite/g++.dg
Hi Rainer.
+/* { dg-lto-options { { -flto -O2 -Werror -Wl,--defsym,__fread_chk=0x1234
this assumes GNU ld and will break on all targets that use different
linkers.
OK, how about this version instead ?
Cheers
Nick
Index: gcc/testsuite/gcc.dg/lto/pr61886_0.c
the actual bug being
checked by the testcase is a generic one, not a target specific one, we
can be reasonably confident that if the problem resurfaces it will be
detected.
So, two possible alternative versions of the patch are proposed below.
Do either take your fancy ?
Cheers
Nick
not find a reference to it in the
documentation.
But malloc really has also different arguments...
True - thinking about it afterwards it occurred to me that renaming the
function to just "fread" would be a lot better ...
Cheers
Nick
ass the patched test.
OK to apply ?
Cheers
Nick
gcc/testsuite/ChangeLog
2016-01-08 Nick Clifton
PR target/68913
* gcc.dg/lto/pr61886_0.c: Rename the external function called
to fread so that it will be found in all target runtimes.
Index: gcc/testsuite/gcc.dg/
all any other function.
Still not quite right. The last sentence should be:
The MDUC registers will only be saved if the interrupt handler
performs a multiplication or division operation or it calls another
function.
Cheers
Nick
regressions or new, unexpected failures.
Cheers
Nick
gcc/testsuite/ChangeLog
2016-01-14 Nick Clifton
* lib/target-supports.exp
(check_effective_target_arm_neon_ok_nocache): Add an option
sequence that includes setting the ARM architecture to ARMv7-A
on")))
That works in my local tests. Are you OK with it ?
Cheers
Nick
st an idea, I let you choose
I tried that - it does not work. :-( If you put dg-additional-options
after a dg-add-options you loose the dg-add-options...
I'll check in the updated patch.
Cheers
Nick
not used
then the entire memcmp can be transformed into nothing. Plus if the
return value is used, but only for an equality comparison with zero then
the transformation can take place.
Cheers
Nick
hard_frame_pointer_offset fields have been initialised.
Tested with no regressions on a mipsisa32-elf toolchain. (I know that
there are lots of different possible mips configurations. I was not
sure which one(s) I should test, so I chose one at random).
OK to apply ?
Cheers
Nick
gcc
Hi Matthias,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69129
this fixes the bootstrap errors for me, seen in both libgnat and libgfortran.
Great - I have gone ahead and checked the patch in.
Cheers
Nick
does turn out that these kinds of functions can
also trigger this kind of bug, then the patch could be extended
later. Plus a new bug report is likely to include a new testcase that
can be added to the testsuite.
So ... OK to apply ?
Cheers
Nick
gcc/ChangeLog
2016-01-26 Nick Clifton
Hi Kyrill,
> 2016-01-22 Kyrylo Tkachov
>
> * config/arm/arm.c (arm_new_rtx_costs, MULT case): Properly extract
> the operands of the SIGN_EXTENDs from a SMUL[TB][TB] rtx.
Approved - please apply.
Cheers
Nick
Hi Kyrill,
I would like to approve this patch, but cannot, since it is not ARM
specific. I think that if you ping the list you may be able to get a
response, and it would be nice to see this whole patch series checked
in before the gcc 6 branch occurs.
Cheers
Nick
PS. If necessary
> 2016-01-22 Kyrylo Tkachov
>
> * gcc.target/arm/wmul-3.c: Simplify test to generate just
> a single smulbb instruction.
> * gcc.target/amr/wmul-1.c: Add -mtune=cortex-a9 to dg-options.
> * gcc.target/amr/wmul-2.c: Likewise.
Approved - please apply.
Cheers
Nick
Hi Jeff,
> I can buy that ;-) OK with a suitable ChangeLog entry.
Thanks! Checked in with this changelog entry.
Cheers
Nick
gcc/ChangeLog
2016-06-22 Nick Clifton
* dwarf2out.c (scompare_loc_descriptor): Use SCALAR_INT_MODE_P() in
place of GET_MODE_CLASS() == MODE_
Hi Guys,
I am applying the patch below to fix a long standing snafu for the
m32r target where the files crtinit.o and crtfini.o were not being
built along with the rest of libgcc.
Tested with no regressions and a lot of test case fixes using an
m32r-elf toolchain.
Cheers
Nick
* configure.ac (nds32*-*-*): Remove entry to enable gdb.
> * configure: Regenerated.
Approved and applied.
Cheers
Nick
to apply ?
Cheers
Nick
gcc/ChangeLog
2016-10-20 Nick Clifton
* plugin.c (register_plugin_info): Produce an error message if the
plugin is not found in the hash table.
Index: gcc/plugin.c
===
--- gcc/plugin.c
?
Cheers
Nick
gcc/ChangeLog
2015-08-04 Nick Clifton
* config/rl78/rl78.c (rl78_force_nonfar_3): Remove optimization
to allow identical far pointers to remain.
gcc/testsuite/ChangeLog
2015-08-04 Nick Clifton
* gcc.target/rl78: New directory.
* gcc.target/rl78
regressions on an rl78-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2015-08-05 Nick Clifton
* config/rl78/rl78.c (rl78_rtx_costs): Treat MULT insns as cheap
if optimizing for size.
Index: gcc/config/rl78/rl78.c
Hi DJ,
This is OK, but note that it prevents some operations like:
__far int i;
foo()
{
i ++;
}
from being implemented with a minimum set of opcodes. This might be
particularly troublesome for volatile far things.
Right - it is something I will have to look into.
Cheers
Nick
Hi DJ,
I am applying the patch below as an obvious fix for a typo in the
msp430's --target-help output.
Cheers
Nick
gcc/ChangeLog
2015-09-01 Nick Clifton
* config/msp430/msp430.opt (mcpu): Fix typo.
Index: gcc/config/msp430/msp43
.
Cheers
Nick
libgcc/ChangeLog
2016-04-25 Nick Clifton
* config/msp430/cmpd.c (__mspabi_cmpf): Add prototype.
(__mspabi_cmpd): Likewise.
* config/msp430/floathidf.c (__floathidf): Likewise.
* config/msp430/floathisf.c (__floathisf): Likewise
* config/msp430
inline.
Cheers
Nick
gcc/ChangeLog
2016-04-25 DJ Delorie
* config/msp430/msp430.md (ashlhi3): Optimize one bit shifts.
(ashrhi3): Likewise.
(lshrhi3): Likewise.
Index: gcc/config/msp430/msp430.md
l78/rl78.opt (msave-mduc-in-interrupts): New option.
> * doc/invoke.texi (RL78 Options): Add -msave-mduc-in-interrupts.
Approved and applied - thanks for persevering with this.
Cheers
Nick
em,
> atomic_fetch_si, atomic_fetch_nandsi,
> atomic__fetchsi, atomic_nand_fetchsi): New patterns.
Approved - please apply.
Cheers
Nick
ed the unexpected failure count in the GDB
testsuite for the MSP430's -mlarge multilib changes from 2253 to 367.
There are no regressions, for MSP430 or x86_64, and no changes to
the GCC testsuite results for either target.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
20
Hi Josef,
Thanks for reporting this problem, and providing a patch to fix it.
I have checked your patch in, along with one, very very minor change
to the formatting of the comment in gen_prefix().
Cheers
Nick
0
0xd9ff22 msp430_data_attr
gcc/current/gcc/config/msp430/msp430.c:1998
It seems that there is a problem with calling the DECL_SECTION_NAME macro on
the
line just before your new code. Are you able to reproduce this problem ?
Cheers
Nick
recording options already, c) it does not conflict with the current
use of -fverbose-asm and d) it ties in nicely with the name of the
option.
Tested, with no regressions on an x86_64-pc-linux-gnu target, and
built for a variety of other targets.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2017
route, in the binaries. This can be useful to users, or distributors,
who want to check that, for example, a specific security option was enabled, or
that a particular a particular optimization was run.
Cheers
Nick
ferent compiler versions, some of the options
> are ignored, others are added, others change meaning, and expanding the list
> of guarded options isn't really useful.
OK -so we need some other way of recording what optimization passes were
actually
run. Fortunately I have something in mind.
Patch withdrawn.
Cheers
Nick
Hi Jozef,
> Ok for trunk and gcc-7-branch?
Approved - please apply (to both).
Cheers
Nick
Hi Jozef,
> Sorry, didn't mention in that last post that I don't have write access,
> could someone please apply this for me.
Applied. Sorry about the delay (again).
Cheers
Nick
, as I do not have write access.
Approved and applied. Thanks for fixing this bug.
Cheers
Nick
ered this (new) failure:
cc1: error: -mlarge requires a 430X-compatible -mmcu=
compiler exited with status 1
FAIL: gcc.target/msp430/no_devices_warn_msp430.c (test for excess errors)
I think that you might need to extend the skip list in the test...
Cheers
Nick
Hi Jozef,
> The changes made in a series of binutils patches
> (https://sourceware.org/ml/binutils/2017-08/msg00274.html)
> to ld and gas require the -mcode/data-region options to be propagated
> from gcc.
>
> The attached patch adds that functionality.
Approved and applied.
Cheers
Nick
xpected successes 21
< # of expected failures128
---
> # of expected passes 3037
> # of unexpected failures 127
> # of unexpected successes 24
> # of expected failures228
Which looks like a win to me. So - any objections to my applying this
pa
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