This patch fixes the pseudo-c BPF assembly syntax used for
*mulsidi3_zeroextend, which was being emitted as:
rN *= wM
instead of the proper way to denote a mul32 in pseudo-C syntax:
wN *= wM
Includes test.
Tested in bpf-unknown-none-gcc target in x86_64-linux-gnu host.
gcc/ChangeLog:
* config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
to force emitting register names using the wN form.
* config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
always use wN written form in pseudo-C assembly syntax.
gcc/testsuite/ChangeLog:
* gcc.target/bpf/mulsidi3-zeroextend-pseudoc.c: New test.
---
gcc/config/bpf/bpf.cc | 18 +++++++++++-------
gcc/config/bpf/bpf.md | 2 +-
.../bpf/mulsidi3-zeroextend-pseudoc.c | 14 ++++++++++++++
3 files changed, 26 insertions(+), 8 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/bpf/mulsidi3-zeroextend-pseudoc.c
diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc
index 63637ece78e..a0956a06972 100644
--- a/gcc/config/bpf/bpf.cc
+++ b/gcc/config/bpf/bpf.cc
@@ -763,13 +763,17 @@ bpf_output_call (rtx target)
return "";
}
-/* Print register name according to assembly dialect.
- In normal syntax registers are printed like %rN where N is the
- register number.
+/* Print register name according to assembly dialect. In normal
+ syntax registers are printed like %rN where N is the register
+ number.
+
In pseudoc syntax, the register names do not feature a '%' prefix.
- Additionally, the code 'w' denotes that the register should be printed
- as wN instead of rN, where N is the register number, but only when the
- value stored in the operand OP is 32-bit wide. */
+ Additionally, the code 'w' denotes that the register should be
+ printed as wN instead of rN, where N is the register number, but
+ only when the value stored in the operand OP is 32-bit wide.
+ Finally, the code 'W' denotes that the register should be printed
+ as wN instead of rN, in all cases, regardless of the mode of the
+ value stored in the operand. */
static void
bpf_print_register (FILE *file, rtx op, int code)
@@ -778,7 +782,7 @@ bpf_print_register (FILE *file, rtx op, int code)
fprintf (file, "%s", reg_names[REGNO (op)]);
else
{
- if (code == 'w' && GET_MODE_SIZE (GET_MODE (op)) <= 4)
+ if (code == 'W' || (code == 'w' && GET_MODE_SIZE (GET_MODE (op)) <= 4))
{
if (REGNO (op) == BPF_FP)
fprintf (file, "w10");
diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md
index 0e2ad8da5ac..522351a6596 100644
--- a/gcc/config/bpf/bpf.md
+++ b/gcc/config/bpf/bpf.md
@@ -184,7 +184,7 @@ (define_insn "*mulsidi3_zeroextend"
(mult:SI (match_operand:SI 1 "register_operand" "0,0")
(match_operand:SI 2 "reg_or_imm_operand" "r,I"))))]
""
- "{mul32\t%0,%2|%w0 *= %w2}"
+ "{mul32\t%0,%2|%W0 *= %W2}"
[(set_attr "type" "alu32")])
;;; Division
diff --git a/gcc/testsuite/gcc.target/bpf/mulsidi3-zeroextend-pseudoc.c
b/gcc/testsuite/gcc.target/bpf/mulsidi3-zeroextend-pseudoc.c
new file mode 100644
index 00000000000..63d63142708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bpf/mulsidi3-zeroextend-pseudoc.c
@@ -0,0 +1,14 @@
+/* Make sure that we are emitting `wN *= wM' and not `rN *= wM' for a mul32 in
+ pseudo-C assembly syntax when emitting assembly for a recognized
+ *mulsidi3_zeroextend pattern. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -masm=pseudoc" } */
+
+unsigned long foo (unsigned snd_cwnd, unsigned mss_cache)
+{
+ return snd_cwnd * mss_cache;
+}
+
+/* { dg-final { scan-assembler-not {\tr. \*= w.\n} } } */
+/* { dg-final { scan-assembler {\tw. \*= w.\n} } } */
--
2.30.2
