On 14/12/12 11:59, Ian Bolton wrote:
Hi Richard,
+ "add\\t%w0, %w2, %w, xt"
^^^ %w1
Got spot. I guess that pattern hasn't fired yet then! I'll fix it.
Now fixed in v3.
I should have said that I am indeed running with REE enabled. It has
some impact (about 70 furt
> Hi Richard,
>
> > + "add\\t%w0, %w2, %w, xt"
> >
> > ^^^ %w1
>
> Got spot. I guess that pattern hasn't fired yet then! I'll fix it.
Now fixed in v3.
> I should have said that I am indeed running with REE enabled. It has
> some impact (about 70 further UXTW removed from
Hi Richard,
> + "add\\t%w0, %w2, %w, xt"
>
> ^^^ %w1
Got spot. I guess that pattern hasn't fired yet then! I'll fix it.
> > This patch significantly reduces the number of redundant
> > uxtw instructions seen in a variety of programs.
> >
> > (There are further patterns th
On 12/13/2012 09:25 AM, Ian Bolton wrote:
> This patch significantly reduces the number of redundant
> uxtw instructions seen in a variety of programs.
>
> (There are further patterns that can be done, but I have them
> in a separate patch that's still in development.)
What do you get if you enab
On 12/13/2012 09:25 AM, Ian Bolton wrote:
> + "add\\t%w0, %w2, %w, xt"
^^^ %w1
r~
Season's greetings to you! :)
I've made zero_extend versions of SI mode patterns that write
to W registers in order to make the implicit zero_extend that
they do explicit, so GCC can be smarter about when it actually
needs to plant a zero_extend (uxtw).
This patch significantly reduces the number
