I'm committing this as an obvious fix to a thinko on my part. The problem was
I didn't think about the case where quad memory instructions were available,
but not VSX instructions. The quad memory support was added to the VSX
implementation of movti for 64-bit, but it wasn't added to the non-VSX
implementation.
I bootstraped it and did a make check comparison with no regressions.
2013-06-14 Michael Meissner <meiss...@linux.vnet.ibm.com>
PR target/57615
* config/rs6000/rs6000.md (mov<mode>_ppc64): Call
rs6000_output_move_128bit to handle emitting quad memory
operations. Set attribute length to 8 bytes.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 200105)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -10020,8 +10020,11 @@ (define_insn "*mov<mode>_ppc64"
"(TARGET_POWERPC64 && VECTOR_MEM_NONE_P (<MODE>mode)
&& (gpc_reg_operand (operands[0], <MODE>mode)
|| gpc_reg_operand (operands[1], <MODE>mode)))"
- "#"
- [(set_attr "type" "store,load,*,*")])
+{
+ return rs6000_output_move_128bit (operands);
+}
+ [(set_attr "type" "store,load,*,*")
+ (set_attr "length" "8")])
(define_split
[(set (match_operand:TI2 0 "int_reg_operand" "")
