On Thu, Jan 18, 2018 at 12:39:05PM -0600, Segher Boessenkool wrote:
> On Wed, Jan 17, 2018 at 06:40:12PM -0500, Michael Meissner wrote:
> > On Wed, Jan 17, 2018 at 04:09:57PM -0600, Segher Boessenkool wrote:
> > > On Tue, Jan 16, 2018 at 10:55:43PM -0500, Michael Meissner wrote:
> > > > PR target/8
On Wed, Jan 17, 2018 at 06:40:12PM -0500, Michael Meissner wrote:
> On Wed, Jan 17, 2018 at 04:09:57PM -0600, Segher Boessenkool wrote:
> > On Tue, Jan 16, 2018 at 10:55:43PM -0500, Michael Meissner wrote:
> > > PR target/83862 pointed out a problem I put into the 128-bit floating
> > > point
> >
On Wed, Jan 17, 2018 at 04:09:57PM -0600, Segher Boessenkool wrote:
> On Tue, Jan 16, 2018 at 10:55:43PM -0500, Michael Meissner wrote:
> > PR target/83862 pointed out a problem I put into the 128-bit floating point
> > type signbit optimization. The issue is we want to avoid doing a load to a
> >
On Tue, Jan 16, 2018 at 10:55:43PM -0500, Michael Meissner wrote:
> PR target/83862 pointed out a problem I put into the 128-bit floating point
> type signbit optimization. The issue is we want to avoid doing a load to a
> floating point/vector register and then a direct move to do signbit, so we
PR target/83862 pointed out a problem I put into the 128-bit floating point
type signbit optimization. The issue is we want to avoid doing a load to a
floating point/vector register and then a direct move to do signbit, so we
change the load to load the upper 64-bits of the floating point value to
