Re: [PATCH], PowerPC long double transistion, patch #4

2018-06-19 Thread Segher Boessenkool
On Fri, Jun 15, 2018 at 03:56:57PM -0400, Michael Meissner wrote: > On Fri, Jun 15, 2018 at 01:39:49PM -0500, Segher Boessenkool wrote: > > On Wed, Jun 13, 2018 at 05:25:33PM -0400, Michael Meissner wrote: > > > This patch fixes the power8 implementation of copysign for IEEE 128-bit > > > floating

Re: [PATCH], PowerPC long double transistion, patch #4

2018-06-15 Thread Michael Meissner
On Fri, Jun 15, 2018 at 01:39:49PM -0500, Segher Boessenkool wrote: > On Wed, Jun 13, 2018 at 05:25:33PM -0400, Michael Meissner wrote: > > This patch fixes the power8 implementation of copysign for IEEE 128-bit > > floating point. In particular, the way the temporary register was allocated > >

Re: [PATCH], PowerPC long double transistion, patch #4

2018-06-15 Thread Segher Boessenkool
On Wed, Jun 13, 2018 at 05:25:33PM -0400, Michael Meissner wrote: > This patch fixes the power8 implementation of copysign for IEEE 128-bit > floating point. In particular, the way the temporary register was allocated > did not use the normal GCC conventions of using a clobber with match_scratch.

Re: [PATCH], PowerPC long double transistion, patch #4

2018-06-13 Thread Michael Meissner
In addition to the previous patch to aid in transitioning the PowerPC long double format to IEEE 128-bit, I have some additional patches that are needed. The previous patch is: https://gcc.gnu.org/ml/gcc-patches/2018-06/msg00634.html This patch fixes the power8 implementation of copysign for IEEE