Re: [PATCH][AArch64] Use Q-reg loads/stores in movmem expansion

2019-01-10 Thread Kyrill Tkachov
Hi James, On 09/01/19 17:50, James Greenhalgh wrote: On Fri, Dec 21, 2018 at 06:30:49AM -0600, Kyrill Tkachov wrote: Hi all, Our movmem expansion currently emits TImode loads and stores when copying 128-bit chunks. This generates X-register LDP/STP sequences as these are the most preferred r

Re: [PATCH][AArch64] Use Q-reg loads/stores in movmem expansion

2019-01-09 Thread Wilco Dijkstra
Hi James, TImode is an integer mode so we strongly prefer using integer registers to avoid inefficient allocations using SIMD registers. We might be able to use TFmode since that prefers Q registers. However we don't support TFmode LDP/STP unless emitted explicitly like in prolog/epilog. LDP of TI

Re: [PATCH][AArch64] Use Q-reg loads/stores in movmem expansion

2019-01-09 Thread James Greenhalgh
On Fri, Dec 21, 2018 at 06:30:49AM -0600, Kyrill Tkachov wrote: > Hi all, > > Our movmem expansion currently emits TImode loads and stores when copying > 128-bit chunks. > This generates X-register LDP/STP sequences as these are the most preferred > registers for that mode. > > For the purpose

Re: [PATCH][AArch64] Use Q-reg loads/stores in movmem expansion

2019-01-04 Thread Kyrill Tkachov
Ping. https://gcc.gnu.org/ml/gcc-patches/2018-12/msg01560.html Thanks, Kyrill On 21/12/18 12:30, Kyrill Tkachov wrote: Hi all, Our movmem expansion currently emits TImode loads and stores when copying 128-bit chunks. This generates X-register LDP/STP sequences as these are the most preferred

[PATCH][AArch64] Use Q-reg loads/stores in movmem expansion

2018-12-21 Thread Kyrill Tkachov
Hi all, Our movmem expansion currently emits TImode loads and stores when copying 128-bit chunks. This generates X-register LDP/STP sequences as these are the most preferred registers for that mode. For the purpose of copying memory, however, we want to prefer Q-registers. This uses one fewer