On Mon, Mar 28, 2022 at 6:55 AM liuhongt wrote:
>
> pinsrw is available for both reg and mem operand under sse2.
> pextrw requires sse4.1 for mem operands.
>
> The patch change attr "isa" for pinsrw mem alternative from sse4_noavx
> to noavx, will enable below optimization.
>
> -movzwl (%
pinsrw is available for both reg and mem operand under sse2.
pextrw requires sse4.1 for mem operands.
The patch change attr "isa" for pinsrw mem alternative from sse4_noavx
to noavx, will enable below optimization.
-movzwl (%rdi), %eax
pxor%xmm1, %xmm1
-pinsrw $0, %
