Tomsich
> > Sent: Tuesday, November 22, 2022 10:35 AM
> > To: Tamar Christina
> > Cc: Richard Biener ; mtsamis
> > ; GCC Patches ;
> > jiangning@amperecomputing.com
> > Subject: Re: [PATCH] Add pattern to convert vector shift + bitwise and +
> > mul
nu.org> On Behalf Of Richard
> > > Biener via Gcc-patches
> > > Sent: Friday, August 26, 2022 10:08 AM
> > > To: mtsamis
> > > Cc: GCC Patches ;
> > > jiangning@amperecomputing.com; Philipp Tomsich
> > >
> > > Subject: Re: [PATCH] Ad
10:08 AM
> > To: mtsamis
> > Cc: GCC Patches ;
> > jiangning@amperecomputing.com; Philipp Tomsich
> >
> > Subject: Re: [PATCH] Add pattern to convert vector shift + bitwise and +
> > multiply to vector compare in some cases.
> >
> > On Sat, Aug
>
> Subject: Re: [PATCH] Add pattern to convert vector shift + bitwise and +
> multiply to vector compare in some cases.
>
> On Sat, Aug 13, 2022 at 11:59 AM mtsamis wrote:
> >
> > When using SWAR (SIMD in a register) techniques a comparison operation
> > within suc
On Sat, Aug 13, 2022 at 11:59 AM mtsamis wrote:
>
> When using SWAR (SIMD in a register) techniques a comparison operation within
> such a register can be made by using a combination of shifts, bitwise and and
> multiplication. If code using this scheme is vectorized then there is
> potential
> t
On Sat, Aug 13, 2022 at 2:59 AM mtsamis wrote:
>
> When using SWAR (SIMD in a register) techniques a comparison operation within
> such a register can be made by using a combination of shifts, bitwise and and
> multiplication. If code using this scheme is vectorized then there is
> potential
> to
On Sat, 13 Aug 2022, mtsamis wrote:
> When using SWAR (SIMD in a register) techniques a comparison operation within
*within
> such a register can be made by using a combination of shifts, bitwise and and
> multiplication. If code using this scheme is vectorized then there is
> potential
> to rep
When using SWAR (SIMD in a register) techniques a comparison operation within
such a register can be made by using a combination of shifts, bitwise and and
multiplication. If code using this scheme is vectorized then there is potential
to replace all these operations with a single vector comparison
