On Tue, 12 Jul 2016, Richard Biener wrote:
> On Tue, 12 Jul 2016, Uros Bizjak wrote:
>
> > On Tue, Jul 12, 2016 at 10:58 AM, Richard Biener wrote:
> > > On Sun, 10 Jul 2016, Uros Bizjak wrote:
> > >
> > >> On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
> > >>
> > >> >> > 2016-07-04 Rich
On Wed, 13 Jul 2016, Uros Bizjak wrote:
> On Sun, Jul 10, 2016 at 10:12 AM, Uros Bizjak wrote:
> > On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
> >
> >>> > 2016-07-04 Richard Biener
> >>> >
> >>> > PR rtl-optimization/68961
> >>> > * fwprop.c (propagate_rtx): Allow SUBREGs of
On Sun, Jul 10, 2016 at 10:12 AM, Uros Bizjak wrote:
> On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
>
>>> > 2016-07-04 Richard Biener
>>> >
>>> > PR rtl-optimization/68961
>>> > * fwprop.c (propagate_rtx): Allow SUBREGs of VEC_CONCAT and CONCAT
>>> > to simplify to a non-c
On Tue, 12 Jul 2016, Uros Bizjak wrote:
> On Tue, Jul 12, 2016 at 10:58 AM, Richard Biener wrote:
> > On Sun, 10 Jul 2016, Uros Bizjak wrote:
> >
> >> On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
> >>
> >> >> > 2016-07-04 Richard Biener
> >> >> >
> >> >> > PR rtl-optimization/689
On Tue, Jul 12, 2016 at 10:58 AM, Richard Biener wrote:
> On Sun, 10 Jul 2016, Uros Bizjak wrote:
>
>> On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
>>
>> >> > 2016-07-04 Richard Biener
>> >> >
>> >> > PR rtl-optimization/68961
>> >> > * fwprop.c (propagate_rtx): Allow SUBREGs
On Sun, 10 Jul 2016, Uros Bizjak wrote:
> On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
>
> >> > 2016-07-04 Richard Biener
> >> >
> >> > PR rtl-optimization/68961
> >> > * fwprop.c (propagate_rtx): Allow SUBREGs of VEC_CONCAT and CONCAT
> >> > to simplify to a non-constant
On Wed, Jul 6, 2016 at 3:18 PM, Richard Biener wrote:
>> > 2016-07-04 Richard Biener
>> >
>> > PR rtl-optimization/68961
>> > * fwprop.c (propagate_rtx): Allow SUBREGs of VEC_CONCAT and CONCAT
>> > to simplify to a non-constant.
>> >
>> > * gcc.target/i386/pr68961.c: New testca
On Tue, 5 Jul 2016, Richard Sandiford wrote:
> Richard Biener writes:
> > On Sun, 3 Jul 2016, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > On Wed, 15 Jun 2016, Richard Sandiford wrote:
> >> >
> >> >> Richard Biener writes:
> >> >> > With the proposed cost change for vector co
Richard Biener writes:
> On Sun, 3 Jul 2016, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > On Wed, 15 Jun 2016, Richard Sandiford wrote:
>> >
>> >> Richard Biener writes:
>> >> > With the proposed cost change for vector construction we will end up
>> >> > vectorizing the testcase in
On Sun, 3 Jul 2016, Richard Sandiford wrote:
> Richard Biener writes:
> > On Wed, 15 Jun 2016, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > With the proposed cost change for vector construction we will end up
> >> > vectorizing the testcase in PR68961 again (on x86_64 and like
Richard Biener writes:
> On Wed, 15 Jun 2016, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > With the proposed cost change for vector construction we will end up
>> > vectorizing the testcase in PR68961 again (on x86_64 and likely
>> > on ppc64le as well after that target gets adjustme
On Mon, 27 Jun 2016, Richard Biener wrote:
> On Wed, 15 Jun 2016, Richard Sandiford wrote:
>
> > Richard Biener writes:
> > > With the proposed cost change for vector construction we will end up
> > > vectorizing the testcase in PR68961 again (on x86_64 and likely
> > > on ppc64le as well after
On Wed, 15 Jun 2016, Richard Sandiford wrote:
> Richard Biener writes:
> > With the proposed cost change for vector construction we will end up
> > vectorizing the testcase in PR68961 again (on x86_64 and likely
> > on ppc64le as well after that target gets adjustments). Currently
> > we can't o
On Fri, Jun 10, 2016 at 11:20:22AM +0200, Richard Biener wrote:
> With the proposed cost change for vector construction we will end up
> vectorizing the testcase in PR68961 again (on x86_64 and likely
> on ppc64le as well after that target gets adjustments). Currently
> we can't optimize that away
Richard Biener writes:
> With the proposed cost change for vector construction we will end up
> vectorizing the testcase in PR68961 again (on x86_64 and likely
> on ppc64le as well after that target gets adjustments). Currently
> we can't optimize that away again noticing the direct overlap of
>
On Mon, 13 Jun 2016, Richard Biener wrote:
> On Fri, 10 Jun 2016, Richard Biener wrote:
>
> >
> > With the proposed cost change for vector construction we will end up
> > vectorizing the testcase in PR68961 again (on x86_64 and likely
> > on ppc64le as well after that target gets adjustments).
On Fri, 10 Jun 2016, Richard Biener wrote:
>
> With the proposed cost change for vector construction we will end up
> vectorizing the testcase in PR68961 again (on x86_64 and likely
> on ppc64le as well after that target gets adjustments). Currently
> we can't optimize that away again noticing t
With the proposed cost change for vector construction we will end up
vectorizing the testcase in PR68961 again (on x86_64 and likely
on ppc64le as well after that target gets adjustments). Currently
we can't optimize that away again noticing the direct overlap of
argument and return registers. T
18 matches
Mail list logo