On Wed, Jun 23, 2021 at 5:55 PM Uros Bizjak wrote:
>
> On Wed, Jun 23, 2021 at 11:41 AM Uros Bizjak wrote:
> >
> > On Wed, Jun 23, 2021 at 11:32 AM Hongtao Liu wrote:
> >
> > > > > > > > Also when allocano cost of GENERAL_REGS is same as MASK_REGS,
> > > > > > > > allocate
> > > > > > > >
On Wed, Jun 23, 2021 at 11:41 AM Uros Bizjak wrote:
>
> On Wed, Jun 23, 2021 at 11:32 AM Hongtao Liu wrote:
>
> > > > > > > Also when allocano cost of GENERAL_REGS is same as MASK_REGS,
> > > > > > > allocate
> > > > > > > MASK_REGS first since it has already been disparaged.
> > > > > > >
> >
On Wed, Jun 23, 2021 at 11:32 AM Hongtao Liu wrote:
> > > > > > Also when allocano cost of GENERAL_REGS is same as MASK_REGS,
> > > > > > allocate
> > > > > > MASK_REGS first since it has already been disparaged.
> > > > > >
> > > > > > gcc/ChangeLog:
> > > > > >
> > > > > > PR
On Wed, Jun 23, 2021 at 4:50 PM Hongtao Liu wrote:
>
> On Wed, Jun 23, 2021 at 3:59 PM Uros Bizjak wrote:
> >
> > On Mon, Jun 21, 2021 at 10:08 AM Hongtao Liu wrote:
> > >
> > > On Mon, Jun 21, 2021 at 3:28 PM Uros Bizjak via Gcc-patches
> > > wrote:
> > > >
> > > > On Mon, Jun 21, 2021 at
On Wed, Jun 23, 2021 at 3:59 PM Uros Bizjak wrote:
>
> On Mon, Jun 21, 2021 at 10:08 AM Hongtao Liu wrote:
> >
> > On Mon, Jun 21, 2021 at 3:28 PM Uros Bizjak via Gcc-patches
> > wrote:
> > >
> > > On Mon, Jun 21, 2021 at 6:56 AM liuhongt wrote:
> > > >
> > > > The avx512 supports bitwise
On Mon, Jun 21, 2021 at 10:08 AM Hongtao Liu wrote:
>
> On Mon, Jun 21, 2021 at 3:28 PM Uros Bizjak via Gcc-patches
> wrote:
> >
> > On Mon, Jun 21, 2021 at 6:56 AM liuhongt wrote:
> > >
> > > The avx512 supports bitwise operations with mask registers, but the
> > > throughput of those
On Mon, Jun 21, 2021 at 3:28 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Mon, Jun 21, 2021 at 6:56 AM liuhongt wrote:
> >
> > The avx512 supports bitwise operations with mask registers, but the
> > throughput of those instructions is much lower than that of the
> > corresponding gpr version, so
On Mon, Jun 21, 2021 at 6:56 AM liuhongt wrote:
>
> The avx512 supports bitwise operations with mask registers, but the
> throughput of those instructions is much lower than that of the
> corresponding gpr version, so we would additionally disparages
> slightly the mask register alternative for
The avx512 supports bitwise operations with mask registers, but the
throughput of those instructions is much lower than that of the
corresponding gpr version, so we would additionally disparages
slightly the mask register alternative for bitwise operations in the
LRA.
Also when allocano cost of