On Tue, May 3, 2011 at 2:39 PM, Jakub Jelinek wrote:
> On Tue, May 03, 2011 at 10:26:50AM +0200, Uros Bizjak wrote:
>> On Mon, May 2, 2011 at 10:16 PM, Jakub Jelinek wrote:
>> IMO, this problem arises due to wrong fix for PR target/37184 [1] that
>> added CCA, CCC, CCO, CCS mode bypasses to ix86_
On Tue, May 03, 2011 at 10:26:50AM +0200, Uros Bizjak wrote:
> On Mon, May 2, 2011 at 10:16 PM, Jakub Jelinek wrote:
> IMO, this problem arises due to wrong fix for PR target/37184 [1] that
> added CCA, CCC, CCO, CCS mode bypasses to ix86_match_ccmode.
Yeah, ix86_match_ccmode was the first place
On Mon, May 2, 2011 at 10:16 PM, Jakub Jelinek wrote:
> As written in the PR, the testcase in the patch is miscompiled on
> x86_64-linux, because during IRA a *btdi operand is changed from
> register to CONST_INT 1 (to which that register was initialized).
> Unfortunately when both 2nd and 3rd ZE
Hi!
As written in the PR, the testcase in the patch is miscompiled on
x86_64-linux, because during IRA a *btdi operand is changed from
register to CONST_INT 1 (to which that register was initialized).
Unfortunately when both 2nd and 3rd ZERO_EXTEND operands are constant
integers, *testqi_ext_3{,_r
