Re: [PATCH] Fix not 8-byte aligned ldrd/strd on ARMv5

On 05/02/2019 15:07, Bernd Edlinger wrote: > Hi, > > due to the AAPCS parameter passing of 8-byte aligned structures, which happen > to > be 8-byte aligned or only 4-byte aligned in the test case, ldrd instructions > are generated that may access 4-byte aligned stack slots, which will trap on >

[PING**2] [PATCH] Fix not 8-byte aligned ldrd/strd on ARMv5

Ping... On 2/12/19 1:32 PM, Bernd Edlinger wrote: > Hi! > > I'd like to ping for this patch: > https://gcc.gnu.org/ml/gcc-patches/2019-02/msg00248.html > > Thanks > Bernd. > > > On 2/5/19 4:07 PM, Bernd Edlinger wrote: >> Hi, >> >> due to the AAPCS parameter passing of 8-byte aligned structure

[PING] [PATCH] Fix not 8-byte aligned ldrd/strd on ARMv5

Hi! I'd like to ping for this patch: https://gcc.gnu.org/ml/gcc-patches/2019-02/msg00248.html Thanks Bernd. On 2/5/19 4:07 PM, Bernd Edlinger wrote: > Hi, > > due to the AAPCS parameter passing of 8-byte aligned structures, which happen > to > be 8-byte aligned or only 4-byte aligned in the t

[PATCH] Fix not 8-byte aligned ldrd/strd on ARMv5

Hi, due to the AAPCS parameter passing of 8-byte aligned structures, which happen to be 8-byte aligned or only 4-byte aligned in the test case, ldrd instructions are generated that may access 4-byte aligned stack slots, which will trap on ARMv5 and ARMv6 according to the following document: htt