On Thu, Feb 06, 2014 at 08:27:09AM -0800, Richard Henderson wrote:
> > All I know is that the generated code with the ZERO_EXTEND has been larger
> > than with the paradoxical subreg. But if you prefer, I can surely emit a
> > ZERO_EXTEND and open a PR for GCC 5.0 that we should investigate why we
On 02/06/2014 08:25 AM, Jakub Jelinek wrote:
> On Thu, Feb 06, 2014 at 08:23:00AM -0800, Richard Henderson wrote:
>> On 02/06/2014 08:02 AM, Jakub Jelinek wrote:
>>> On Thu, Feb 06, 2014 at 06:53:55AM -0800, Richard Henderson wrote:
On 02/04/2014 04:40 AM, Jakub Jelinek wrote:
> - tem =
On Thu, Feb 06, 2014 at 08:23:00AM -0800, Richard Henderson wrote:
> On 02/06/2014 08:02 AM, Jakub Jelinek wrote:
> > On Thu, Feb 06, 2014 at 06:53:55AM -0800, Richard Henderson wrote:
> >> On 02/04/2014 04:40 AM, Jakub Jelinek wrote:
> >>> - tem = expand_shift (LSHIFT_EXPR, mode, lopart, hprec,
On 02/06/2014 08:02 AM, Jakub Jelinek wrote:
> On Thu, Feb 06, 2014 at 06:53:55AM -0800, Richard Henderson wrote:
>> On 02/04/2014 04:40 AM, Jakub Jelinek wrote:
>>> - tem = expand_shift (LSHIFT_EXPR, mode, lopart, hprec, NULL_RTX, 1);
>>> + tem = gen_rtx_SUBREG (mode, lopart, 0);
>>> +
On Thu, Feb 06, 2014 at 06:53:55AM -0800, Richard Henderson wrote:
> On 02/04/2014 04:40 AM, Jakub Jelinek wrote:
> > - tem = expand_shift (LSHIFT_EXPR, mode, lopart, hprec, NULL_RTX, 1);
> > + tem = gen_rtx_SUBREG (mode, lopart, 0);
> > + tem = expand_shift (LSHIFT_EXPR, mode, tem, hpr
On 02/04/2014 04:40 AM, Jakub Jelinek wrote:
> - tem = expand_shift (LSHIFT_EXPR, mode, lopart, hprec, NULL_RTX, 1);
> + tem = gen_rtx_SUBREG (mode, lopart, 0);
> + tem = expand_shift (LSHIFT_EXPR, mode, tem, hprec, NULL_RTX, 1);
I would be happier with gen_lowpart rather than th
Hi!
ubsan/overflow-1.c test ICEs on ppc32, because lopart is SImode, and we
attempt to do a DImode left shift on it by 32.
We don't really care about the upper bits, those are all shifted away
anyway, so this patch fixes it by adding a paradoxical SUBREG, which results
in better generated code com
