Re: [PATCH] Improve AVX512 vector shift patterns (PR target/82370)

2017-10-19 Thread Kirill Yukhin
Hello Jakub, On 04 Oct 21:29, Jakub Jelinek wrote: > Hi! > > EVEX encoded vector shifts by immediate allow memory operand as input. > We handle this right for the sra patterns by having 3 distinct > define_insns, one TARGET_AVX512VL with masking, where the non-masked > insn names start with *,

[PATCH] Improve AVX512 vector shift patterns (PR target/82370)

2017-10-04 Thread Jakub Jelinek
Hi! EVEX encoded vector shifts by immediate allow memory operand as input. We handle this right for the sra patterns by having 3 distinct define_insns, one TARGET_AVX512VL with masking, where the non-masked insn names start with *, that have (=v,v,v) and (=v,vm,N) alternatives and