Re: [PATCH] PR target/67480: AVX512 bitwise logic insns pattern is incorrect

2015-09-22 Thread Kirill Yukhin
Hello Alexander, On 18 Sep 17:51, Alexander Fomin wrote: > Hi, > On Tue, Sep 08, 2015 at 11:41:50AM +0300, Kirill Yukhin wrote: > > Hi, > > So, here you'll emit, e.g. "pandq %xmm16, %xmm17" > > If think it'll be better to attach AVX-512VL related suffix while > > discriminating > > alternatives. >

Re: [PATCH] PR target/67480: AVX512 bitwise logic insns pattern is incorrect

2015-09-18 Thread Alexander Fomin
Hi, On Tue, Sep 08, 2015 at 11:41:50AM +0300, Kirill Yukhin wrote: > Hi, > On 07 Sep 19:07, Alexander Fomin wrote: > > + tmp = TARGET_AVX512VL ? "p" : "p"; > Suppose masking is applied and 1st alternative chosen... > > + ops = "%s\t{%%2, %%0|%%0, %%2}"; > We'll reach here having p %xm

Re: [PATCH] PR target/67480: AVX512 bitwise logic insns pattern is incorrect

2015-09-08 Thread Kirill Yukhin
Hi, On 07 Sep 19:07, Alexander Fomin wrote: > (define_insn "3" > - [(set (match_operand:VI 0 "register_operand" "=x,v") > - (any_logic:VI > - (match_operand:VI 1 "nonimmediate_operand" "%0,v") > - (match_operand:VI 2 "nonimmediate_operand" "xm,vm")))] > + [(set (match_operand:VI4

[PATCH] PR target/67480: AVX512 bitwise logic insns pattern is incorrect

2015-09-07 Thread Alexander Fomin
This patch adresses PR target/67480. As there are no bitwise logic instructions for BYTE/WORD in AVX512, we should split corresponding pattern into two different patterns, namely: (a) any bitwise logic, for SI/DI modes, masking is supported; (b) any bitwise logic, for QI/HI modes, maski