On Tue, 14 May 2019, Richard Sandiford wrote:
> Richard Biener writes:
> > On Tue, 14 May 2019, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > The following makes SSA rewrite (update-address-taken) recognize
> >> > sets of aligned sub-vectors in aligned position
> >> > (v2qi int
Richard Biener writes:
> On Tue, 14 May 2019, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > The following makes SSA rewrite (update-address-taken) recognize
>> > sets of aligned sub-vectors in aligned position
>> > (v2qi into v16qi, but esp. v8qi into v16qi). It uses the
>> > BIT_INS
On Tue, 14 May 2019, Richard Sandiford wrote:
> Richard Biener writes:
> > The following makes SSA rewrite (update-address-taken) recognize
> > sets of aligned sub-vectors in aligned position
> > (v2qi into v16qi, but esp. v8qi into v16qi). It uses the
> > BIT_INSERT_EXPR support for this, enabl
Richard Biener writes:
> The following makes SSA rewrite (update-address-taken) recognize
> sets of aligned sub-vectors in aligned position
> (v2qi into v16qi, but esp. v8qi into v16qi). It uses the
> BIT_INSERT_EXPR support for this, enabling that for vector
> typed values. This makes us turn f
The following makes SSA rewrite (update-address-taken) recognize
sets of aligned sub-vectors in aligned position
(v2qi into v16qi, but esp. v8qi into v16qi). It uses the
BIT_INSERT_EXPR support for this, enabling that for vector
typed values. This makes us turn for example
typedef unsigned cha