On 7/9/24 12:30 PM, Patrick O'Neill wrote:
On 7/8/24 13:36, Jeff Law wrote:
On 7/8/24 1:25 PM, Patrick O'Neill wrote:
https://gcc.gnu.org/onlinedocs/gccint/Machine-Independent-
Predicates.html
| Function: const_int_operand
| This predicate allows any CONST_INT expression that
On 7/8/24 13:36, Jeff Law wrote:
On 7/8/24 1:25 PM, Patrick O'Neill wrote:
https://gcc.gnu.org/onlinedocs/gccint/Machine-Independent-Predicates.html
| Function: const_int_operand
| This predicate allows any CONST_INT expression that fits in
mode. It is an appropriate choice for an
On 7/8/24 1:25 PM, Patrick O'Neill wrote:
https://gcc.gnu.org/onlinedocs/gccint/Machine-Independent-Predicates.html
| Function: const_int_operand
| This predicate allows any CONST_INT expression that fits in mode.
It is an appropriate choice for an immediate operand that does not allow
On 7/6/24 07:20, Jeff Law wrote:
On 7/3/24 3:16 PM, Patrick O'Neill wrote:
Regarding the amocas.q follow-up patch:
I'm having trouble with matching any TImode compare-and-swap
patterns. Here's the RTL I'm trying:
(define_mode_iterator SUPERGPR [SI DI TI])
(define_insn
On 7/3/24 3:16 PM, Patrick O'Neill wrote:
Regarding the amocas.q follow-up patch:
I'm having trouble with matching any TImode compare-and-swap patterns.
Here's the RTL I'm trying:
(define_mode_iterator SUPERGPR [SI DI TI])
(define_insn "zacas_atomic_cas_value"
[(set
Regarding the amocas.q follow-up patch:
I'm having trouble with matching any TImode compare-and-swap patterns.
Here's the RTL I'm trying:
(define_mode_iterator SUPERGPR [SI DI TI])
(define_insn "zacas_atomic_cas_value"
[(set (match_operand:SUPERGPR 0 "register_operand" "=")
From: Gianluca Guida
This patch adds support for amocas.{b|h|w|d}. Support for amocas.q
(64/128 bit cas for rv32/64) will be added in a future patch.
Extension: https://github.com/riscv/riscv-zacas
Ratification: https://jira.riscv.org/browse/RVS-680
gcc/ChangeLog:
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