Re: [PATCH] RISC-V: Fix VSETVL PASS regression

2023-11-30 Thread juzhe.zh...@rivai.ai
All regressions (zve64d/zvl128b/zvl256b/zvl512b/zvl1024b) passed. juzhe.zh...@rivai.ai From: Juzhe-Zhong Date: 2023-12-01 08:51 To: gcc-patches CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong Subject: [PATCH] RISC-V: Fix VSETVL PASS regression This patch fix 2 regression (one

[PATCH] RISC-V: Fix VSETVL PASS regression

2023-11-30 Thread Juzhe-Zhong
This patch fix 2 regression (one is bug regression, the other is performance regression). Those 2 regressions are both we are comparing ratio for same AVL in wrong place. 1. BUG regression: avl_single-84.c: f0: li a5,999424 add a1,a1,a5 li a4,299008

Re: [PATCH] RISC-V: Fix VSETVL PASS regression

2023-11-27 Thread juzhe.zhong
committed as it passed zvl128/256/512/1024 no regression. Replied Message FromJuzhe-ZhongDate11/27/2023 21:24 Togcc-patches@gcc.gnu.org Cckito.ch...@gmail.com,kito.ch...@sifive.com,jeffreya...@gmail.com,rdapp@gmail.com,Juzhe-ZhongSubject[PATCH] RISC-V: Fix VSETVL PASS regression

[PATCH] RISC-V: Fix VSETVL PASS regression

2023-11-27 Thread Juzhe-Zhong
This patch is regression fix patch, not an optimization patch. Since trunk GCC generates redundant vsetvl than GCC-13. This is the case: bb 2: def a2 (vsetvl a2, zero) bb 3: use a2 bb 4: use a2 (vle) before this patch: bb 2: vsetvl a2 zero bb 3: vsetvl zero, zero > should be eliminate