> -Original Message-
> From: Robin Dapp
> Sent: 2024年7月17日 22:43
> To: Demin Han ; gcc-patches@gcc.gnu.org
> Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; pan2...@intel.com;
> jeffreya...@gmail.com
> Subject: Re: [PATCH] RISC-V: More support of vx and vf for
> > diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
> > index d5793acc999..a772153 100644
> > --- a/gcc/config/riscv/autovec.md
> > +++ b/gcc/config/riscv/autovec.md
> > @@ -690,7 +690,7 @@ (define_expand "vec_cmp"
> > [(set (match_operand: 0 "register_operand")
> >
Hi Demin,
> + void add_integer_operand (rtx x)
> + {
> +create_integer_operand (&m_ops[m_opno++], INTVAL (x));
> +gcc_assert (m_opno <= MAX_OPERANDS);
> + }
Can that be folded into add_input_operand somehow?
>void add_input_operand (rtx x, machine_mode mode)
>{
> create_i
On 7/17/24 4:55 AM, demin.han wrote:
There are still some cases which can't utilize vx or vf for autovec
comparison after last_combine pass.
1. integer comparison when imm isn't in range of [-16, 15]
2. float imm is 0.0
3. DI or DF mode under RV32
This patch fix above mentioned issues.
Test
Thanks for supporting vf/vx transforming.
I'd rather let Robin review this patch.
juzhe.zh...@rivai.ai
From: demin.han
Date: 2024-07-17 18:55
To: gcc-patches
CC: juzhe.zhong; kito.cheng; pan2.li; jeffreyalaw; rdapp.gcc
Subject: [PATCH] RISC-V: More support of vx and vf for autovec compa
There are still some cases which can't utilize vx or vf for autovec
comparison after last_combine pass.
1. integer comparison when imm isn't in range of [-16, 15]
2. float imm is 0.0
3. DI or DF mode under RV32
This patch fix above mentioned issues.
Tested on RV32 and RV64.
gcc/ChangeLog:
