This patch support VLS modes auto-vectorization to enhance VLA
auto-vectorization
when niters is known.
Consider this following case:
#include
#define DEF_OP_VV(PREFIX, NUM, TYPE, OP) \
void __attribute__ ((noinline, noclone))
Hi Juzhe,
thanks, looks good from my side.
> +/* { dg-final { scan-assembler-times {vand\.vi\s+v[0-9]+,\s*v[0-9]+,\s*-16}
> 42 } } */
> +/* { dg-final { scan-assembler-not {csrr} } } */
I was actually looking for a scan-assembler-not vsetvli... but the
csrr will do as well.
Regards
Robin
; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support VLS basic operation auto-vectorization
Hi Juzhe,
thanks, looks good from my side.
> +/* { dg-final { scan-assembler-times {vand\.vi\s+v[0-9]+,\s*v[0-9]+,\s*-16}
> 42 } } */
> +/* { dg-final { scan-assembler-not {csrr} } } *
Committed, thanks Robin.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of ???
Sent: Tuesday, August 8, 2023 5:15 AM
To: rdapp.gcc ; gcc-patches
Cc: rdapp.gcc ; kito.cheng ;
kito.cheng ; Jeff Law
Subject: Re: Re: [PATCH] RISC-V: Support VLS basic operation auto-vectorization
