Re: [PATCH] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering

2023-06-27 Thread Kito Cheng via Gcc-patches
It seems because of canonical form of RTL, right? LGTM, but plz add some more comments about the reason into the commit log. On Wed, Jun 28, 2023 at 11:00 AM Juzhe-Zhong wrote: > > gcc/ChangeLog: > > * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand. > *

[PATCH] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering

2023-06-27 Thread Juzhe-Zhong
gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand. * config/riscv/vector.md (@pred_single_widen_): Remove. (@pred_single_widen_add): New pattern. (@pred_single_widen_sub): New pattern. gcc/testsuite/ChangeLog: *