RE: [PATCH] RISC-V: Support vfwmacc combine lowering

@gmail.com Subject: Re: [PATCH] RISC-V: Support vfwmacc combine lowering LGTM On Wed, Jun 28, 2023 at 4:28 PM Juzhe-Zhong wrote: > > This patch adds combine pattern as follows: > > 1. (set (reg) (fma (float_extend:reg)(float_extend:reg)(reg))) >This pattern allows combine:

Re: [PATCH] RISC-V: Support vfwmacc combine lowering

LGTM On Wed, Jun 28, 2023 at 4:28 PM Juzhe-Zhong wrote: > > This patch adds combine pattern as follows: > > 1. (set (reg) (fma (float_extend:reg)(float_extend:reg)(reg))) >This pattern allows combine: vfwcvt + vfwcvt + vfmacc ==> vwfmacc. > > 2. (set (reg) (fma (float_extend:reg)(reg)(reg)))

[PATCH] RISC-V: Support vfwmacc combine lowering

This patch adds combine pattern as follows: 1. (set (reg) (fma (float_extend:reg)(float_extend:reg)(reg))) This pattern allows combine: vfwcvt + vfwcvt + vfmacc ==> vwfmacc. 2. (set (reg) (fma (float_extend:reg)(reg)(reg))) This pattern is the intermediate IR that enhances the combine