[PATCH] RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.

2023-10-16 Thread Juzhe-Zhong
void foo8 (int64_t *restrict a) { for (int i = 0; i < 16; ++i) a[i] = a[i]-16; } We use VLS modes instead of VLA modes even it is specified by dynamic LMUL. gcc/ChangeLog: * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes. gcc/testsuite/ChangeLog:

Re: [PATCH] RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.

2023-10-16 Thread Robin Dapp
Hi Juzhe, this LGTM. I was first concerned whether we would want to stop e.g. at LMUL = 1 and only continue with a specific flag but actually this should be done via the costs. If an implementation wants to penalize or incentivize some behavior it can always adjust the costs which should be suff

Re: Re: [PATCH] RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements.

2023-10-16 Thread juzhe.zh...@rivai.ai
Thanks Robin. Committed. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-10-16 17:12 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Use VLS modes if the NITERS is known and smaller than VLS mode elements. Hi Juzhe, this LGTM