- fmv.x.s/fmv.s.x renamed to fmv.x.w/fmv.w.x in the latest RISC-V ISA
manual.
- Tested rv32gc/rv64gc on bare-metal with qemu.
ChangeLog
gcc/
Kito Cheng
* config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
rather than fmv.x.s/fmv.s.x.
---
gcc/config/riscv/ris
On Mon, Feb 17, 2020 at 9:57 PM Kito Cheng wrote:
> * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
> rather than fmv.x.s/fmv.s.x.
Looks good to me also.
By the way, since you are listed as one of the riscv port maintainers,
you could make changes like this witho
Committed.
Hi Jim:
Thanks for your review and reply, I'll commit directly for such simple
patch in future :)
On Wed, Feb 19, 2020 at 7:33 AM Jim Wilson wrote:
>
> On Mon, Feb 17, 2020 at 9:57 PM Kito Cheng wrote:
> > * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
> >
On Tue, 18 Feb 2020, Kito Cheng wrote:
> - fmv.x.s/fmv.s.x renamed to fmv.x.w/fmv.w.x in the latest RISC-V ISA
>manual.
The new mnemonics have been supported by GAS for a little while now and
the old ones have been retained, however this is still a change that
breaks backwards compatibili
On Tue, Mar 17, 2020 at 2:42 PM Maciej W. Rozycki wrote:
> On Tue, 18 Feb 2020, Kito Cheng wrote:
> > - fmv.x.s/fmv.s.x renamed to fmv.x.w/fmv.w.x in the latest RISC-V ISA
> >manual.
>
> The new mnemonics have been supported by GAS for a little while now and
> the old ones have been retained
On Wed, 18 Mar 2020, Jim Wilson wrote:
> > The new mnemonics have been supported by GAS for a little while now and
> > the old ones have been retained, however this is still a change that
> > breaks backwards compatibility. So I wonder if we shouldn't have an
> > autoconf test included for this
