On 04/10/2017 11:37 PM, Ulrich Weigand wrote:
> Dominik Vogt wrote:
>
>> So, we could add a special case for const0_rtx that generates the
>> LT pattern and does not rely on Combine, and get rid of the
>> peephole. I'm not sure this is worthwhile thoug, because the
>> peephole has other
Dominik Vogt wrote:
> So, we could add a special case for const0_rtx that generates the
> LT pattern and does not rely on Combine, and get rid of the
> peephole. I'm not sure this is worthwhile thoug, because the
> peephole has other beneficial effects (as discussed), and until
> we've solved
On Mon, Apr 10, 2017 at 10:13:01AM +0100, Dominik Vogt wrote:
> On Fri, Apr 07, 2017 at 07:22:23PM +0200, Ulrich Weigand wrote:
> > Dominik Vogt wrote:
> > > On Fri, Apr 07, 2017 at 04:34:44PM +0200, Ulrich Weigand wrote:
> > > > > +; Peephole to combine a load-and-test from volatile memory which
On Fri, Apr 07, 2017 at 07:22:23PM +0200, Ulrich Weigand wrote:
> Dominik Vogt wrote:
> > On Fri, Apr 07, 2017 at 04:34:44PM +0200, Ulrich Weigand wrote:
> > > > +; Peephole to combine a load-and-test from volatile memory which
> > > > combine does
> > > > +; not do.
> > > > +(define_peephole2
>
Dominik Vogt wrote:
> On Fri, Apr 07, 2017 at 04:34:44PM +0200, Ulrich Weigand wrote:
> > > +; Peephole to combine a load-and-test from volatile memory which combine
> > > does
> > > +; not do.
> > > +(define_peephole2
> > > + [(set (match_operand:GPR 0 "register_operand")
> > > +
On Fri, Apr 07, 2017 at 04:34:44PM +0200, Ulrich Weigand wrote:
> > +; Peephole to combine a load-and-test from volatile memory which combine
> > does
> > +; not do.
> > +(define_peephole2
> > + [(set (match_operand:GPR 0 "register_operand")
> > + (match_operand:GPR 2 "memory_operand"))
> > +
Dominik Vogt wrote:
> v4:
>
> * Remoce CCZZ1 iterator.
> * Remove duplicates of CS patterns.
> * Move the skip_cs_label so that output is moved to vtarget even
> if the CS instruction was not used.
> * Removed leftover from "sne" (from an earlier version of the
> * patch).
e-1.c: New test.
* gcc.target/s390/md/atomic_compare_exchange-1.inc: New test.
* gcc.target/s390/md/atomic_exchange-1.inc: New test.
>From 0dbcab9152b3d1b7c3a6e72f6d45b8eb56ab40ae Mon Sep 17 00:00:00 2001
From: Dominik Vogt <v...@linux.vnet.ibm.com>
Date: Thu, 23 Feb
I wrote (incorrectly):
> >[(parallel
> > [(set (match_operand:SI 0 "register_operand" "")
> > (match_operator:SI 1 "s390_eqne_operator"
> > - [(match_operand:CCZ1 2 "register_operand")
> > + [(match_operand 2 "cc_reg_operand")
> > (match_operand 3
Dominik Vogt wrote:
> > v3:
> >
> > * Remove sne* patterns.
> > * Move alignment check from s390_expand_cs to s390.md.
> > * Use s_operand instead of memory_nosymref_operand.
> > * Remove memory_nosymref_operand.
> > * Allow any CC-mode in cstorecc4 for TARGET_Z196.
> > * Fix EQ with
plement all integer modes.
gcc/testsuite/ChangeLog-dv-atomic-gcc7
* gcc.target/s390/md/atomic_compare_exchange-1.c: New test.
* gcc.target/s390/md/atomic_compare_exchange-1.inc: New test.
* gcc.target/s390/md/atomic_exchange-1.inc: New test.
>From d5e4c5785eaee07
Dominik Vogt wrote:
> On Mon, Mar 27, 2017 at 09:27:35PM +0100, Dominik Vogt wrote:
> > The attached patch optimizes the atomic_exchange and
> > atomic_compare patterns on s390 and s390x (mostly limited to
> > SImode and DImode). Among general optimizaation, the changes fix
> > most of the
On Mon, Mar 27, 2017 at 09:27:35PM +0100, Dominik Vogt wrote:
> The attached patch optimizes the atomic_exchange and
> atomic_compare patterns on s390 and s390x (mostly limited to
> SImode and DImode). Among general optimizaation, the changes fix
> most of the problems reported in PR 80080:
>
-1.c: New test.
* gcc.target/s390/md/atomic_compare_exchange-1.inc: New test.
* gcc.target/s390/md/atomic_exchange-1.inc: New test.
>From 17822384e33b4b98c299ab25969907eb2b9184ee Mon Sep 17 00:00:00 2001
From: Dominik Vogt <v...@linux.vnet.ibm.com>
Date: Thu, 23 Feb 2017 1
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