On Fri, 14 Apr 2023 at 13:02, Kyrylo Tkachov wrote:
> Hi Philipp,
>
> From: Philipp Tomsich
> Sent: Friday, April 14, 2023 11:26 AM
> To: Kyrylo Tkachov
> Cc: gcc-patches@gcc.gnu.org; Di Zhao
> Subject: Re: [PATCH] aarch64: disable LDP via tuning structure for
> -mcp
Hi Philipp,
From: Philipp Tomsich
Sent: Friday, April 14, 2023 11:26 AM
To: Kyrylo Tkachov
Cc: gcc-patches@gcc.gnu.org; Di Zhao
Subject: Re: [PATCH] aarch64: disable LDP via tuning structure for -mcpu=ampere1
On Fri, 14 Apr 2023 at 11:31, Philipp Tomsich <mailto:philipp.toms...@vrull
2023 12:22 AM
> > > To: gcc-patches@gcc.gnu.org
> > > Cc: Kyrylo Tkachov ; Philipp Tomsich
> > > ; Di Zhao
> > > Subject: [PATCH] aarch64: disable LDP via tuning structure for -
> > > mcpu=ampere1
> > >
> > > AmpereOne (-mcpu=am
gt;
> > Hi Philipp,
> >
> > > -Original Message-
> > > From: Philipp Tomsich
> > > Sent: Friday, April 14, 2023 12:22 AM
> > > To: gcc-patches@gcc.gnu.org
> > > Cc: Kyrylo Tkachov ; Philipp Tomsich
> > > ; Di Zhao
>
> ; Di Zhao
> > Subject: [PATCH] aarch64: disable LDP via tuning structure for -
> > mcpu=ampere1
> >
> > AmpereOne (-mcpu=ampere1) breaks LDP instructions into two uops.
> > Given the chance that this causes instructions to slip into the next
> > dec
Hi Philipp,
> -Original Message-
> From: Philipp Tomsich
> Sent: Friday, April 14, 2023 12:22 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Philipp Tomsich
> ; Di Zhao
> Subject: [PATCH] aarch64: disable LDP via tuning structure for -
> mcpu=amper
AmpereOne (-mcpu=ampere1) breaks LDP instructions into two uops.
Given the chance that this causes instructions to slip into the next
decoding cycle and the additional overheads when handling
cacheline-crossing LDP instructions, we disable the generation of LDP
isntructions through the tuning
