gcc/ChangeLog:
* config/arm/arm.cc (thumb1_legitimate_address_p):
Use VIRTUAL_REGISTER_P predicate.
(arm_eliminable_register): Ditto.
* config/avr/avr.md (push<mode>_1): Ditto.
* config/bfin/predicates.md (register_no_elim_operand): Ditto.
* config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
* config/i386/predicates.md (register_no_elim_operand): Ditto.
* config/iq2000/predicates.md (call_insn_operand): Ditto.
* config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
Tested by building cc1 and compiling a hello-world.c application for
all affected arches.
Pushed to master as an obvious patch.
Uros.
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index bf7ff9a9704..1164119a300 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -9105,9 +9105,7 @@ thumb1_legitimate_address_p (machine_mode mode, rtx x,
int strict_p)
else if (REG_P (XEXP (x, 0))
&& (REGNO (XEXP (x, 0)) == FRAME_POINTER_REGNUM
|| REGNO (XEXP (x, 0)) == ARG_POINTER_REGNUM
- || (REGNO (XEXP (x, 0)) >= FIRST_VIRTUAL_REGISTER
- && REGNO (XEXP (x, 0))
- <= LAST_VIRTUAL_POINTER_REGISTER))
+ || VIRTUAL_REGISTER_P (XEXP (x, 0)))
&& GET_MODE_SIZE (mode) >= 4
&& CONST_INT_P (XEXP (x, 1))
&& (INTVAL (XEXP (x, 1)) & 3) == 0)
@@ -13905,8 +13903,7 @@ arm_eliminable_register (rtx x)
{
return REG_P (x) && (REGNO (x) == FRAME_POINTER_REGNUM
|| REGNO (x) == ARG_POINTER_REGNUM
- || (REGNO (x) >= FIRST_VIRTUAL_REGISTER
- && REGNO (x) <= LAST_VIRTUAL_REGISTER));
+ || VIRTUAL_REGISTER_P (x));
}
/* Return GENERAL_REGS if a scratch register required to reload x to/from
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index e581e959e57..43b75046384 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -417,8 +417,7 @@ (define_expand "push<mode>1"
operands[0] = copy_to_mode_reg (<MODE>mode, operands[0]);
}
else if (REG_P (operands[0])
- && IN_RANGE (REGNO (operands[0]), FIRST_VIRTUAL_REGISTER,
- LAST_VIRTUAL_REGISTER))
+ && VIRTUAL_REGISTER_P (operands[0]))
{
// Byte-wise pushing of virtual regs might result in something like
//
diff --git a/gcc/config/bfin/predicates.md b/gcc/config/bfin/predicates.md
index 09ec5a4bd86..632634eb0f7 100644
--- a/gcc/config/bfin/predicates.md
+++ b/gcc/config/bfin/predicates.md
@@ -175,7 +175,7 @@ (define_predicate "symbolic_or_const_operand"
(define_predicate "symbol_ref_operand"
(match_code "symbol_ref"))
-;; True for any non-virtual or eliminable register. Used in places where
+;; True for any non-virtual and non-eliminable register. Used in places where
;; instantiation of such a register may cause the pattern to not be recognized.
(define_predicate "register_no_elim_operand"
(match_operand 0 "register_operand")
@@ -184,8 +184,7 @@ (define_predicate "register_no_elim_operand"
op = SUBREG_REG (op);
return !(op == arg_pointer_rtx
|| op == frame_pointer_rtx
- || (REGNO (op) >= FIRST_PSEUDO_REGISTER
- && REGNO (op) <= LAST_VIRTUAL_REGISTER));
+ || VIRTUAL_REGISTER_P (op));
})
;; Test for an operator valid in a BImode conditional branch
diff --git a/gcc/config/h8300/predicates.md b/gcc/config/h8300/predicates.md
index 02da8aa413a..486c4d7ce66 100644
--- a/gcc/config/h8300/predicates.md
+++ b/gcc/config/h8300/predicates.md
@@ -378,8 +378,7 @@ (define_predicate "register_no_sp_elim_operand"
return !(op == stack_pointer_rtx
|| op == arg_pointer_rtx
|| op == frame_pointer_rtx
- || IN_RANGE (REGNO (op),
- FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
+ || VIRTUAL_REGISTER_P (op));
})
;; Return nonzero if X is a constant whose absolute value is greater
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index b4d9ab40ab9..746101a1755 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -702,7 +702,7 @@ (define_predicate "call_register_no_elim_operand"
return register_no_elim_operand (op, mode);
})
-;; True for any non-virtual or eliminable register. Used in places where
+;; True for any non-virtual and non-eliminable register. Used in places where
;; instantiation of such a register may cause the pattern to not be recognized.
(define_predicate "register_no_elim_operand"
(match_operand 0 "register_operand")
@@ -717,8 +717,7 @@ (define_predicate "register_no_elim_operand"
return !(op == arg_pointer_rtx
|| op == frame_pointer_rtx
- || IN_RANGE (REGNO (op),
- FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
+ || VIRTUAL_REGISTER_P (op));
})
;; Similarly, but include the stack pointer. This is used to prevent esp
diff --git a/gcc/config/iq2000/predicates.md b/gcc/config/iq2000/predicates.md
index 4adc108df46..1330f7d613c 100644
--- a/gcc/config/iq2000/predicates.md
+++ b/gcc/config/iq2000/predicates.md
@@ -206,8 +206,7 @@ (define_predicate "call_insn_operand"
{
return (CONSTANT_ADDRESS_P (op)
|| (GET_CODE (op) == REG && op != arg_pointer_rtx
- && ! (REGNO (op) >= FIRST_PSEUDO_REGISTER
- && REGNO (op) <= LAST_VIRTUAL_REGISTER)));
+ && ! VIRTUAL_REGISTER_P (op)));
})
;; Return nonzero if OP is valid as a source operand for a move
diff --git a/gcc/config/microblaze/microblaze.h
b/gcc/config/microblaze/microblaze.h
index 0398902362b..8a0e1a76adf 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -372,9 +372,8 @@ extern enum reg_class microblaze_regno_to_class[];
since they may change into reg + const, which the patterns
can't handle yet. */
#define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \
- || (GET_CODE (X) == REG && X != arg_pointer_rtx\
- && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER \
- && REGNO (X) <= LAST_VIRTUAL_REGISTER)))
+ || (GET_CODE (X) == REG && X != arg_pointer_rtx \
+ && ! VIRTUAL_REGISTER_P (X)))
/* True if VALUE is a signed 16-bit number. */
#define SMALL_OPERAND(VALUE) \
