On Wed, 13 Jan 2021, Jakub Jelinek wrote:
> On Wed, Jan 13, 2021 at 08:26:49AM +0100, Richard Biener wrote:
> > + if (op1 && op0 != op1)
> > +op1 = force_reg (vmode, op1);
> >
> > code (presumably to handle RTX sharing here)?
>
> That could be actually simplified, incrementally e.g. to:
>
On Wed, Jan 13, 2021 at 8:13 AM Jakub Jelinek wrote:
>
> Hi!
>
> The following patch implements what I've talked about, i.e. to no longer
> force operands of vec_perm_const into registers in the generic code, but let
> each of the (currently 8) targets force it into registers individually,
> givin
On Wed, Jan 13, 2021 at 08:26:49AM +0100, Richard Biener wrote:
> + if (op1 && op0 != op1)
> +op1 = force_reg (vmode, op1);
>
> code (presumably to handle RTX sharing here)?
That could be actually simplified, incrementally e.g. to:
if (op0)
{
rtx nop0 = force_reg (vmode, op0);
On Wed, Jan 13, 2021 at 08:26:49AM +0100, Richard Biener wrote:
> On Wed, 13 Jan 2021, Jakub Jelinek wrote:
>
> > Hi!
> >
> > The following patch implements what I've talked about, i.e. to no longer
> > force operands of vec_perm_const into registers in the generic code, but let
> > each of the (
On Wed, 13 Jan 2021, Jakub Jelinek wrote:
> Hi!
>
> The following patch implements what I've talked about, i.e. to no longer
> force operands of vec_perm_const into registers in the generic code, but let
> each of the (currently 8) targets force it into registers individually,
> giving the target
Hi!
The following patch implements what I've talked about, i.e. to no longer
force operands of vec_perm_const into registers in the generic code, but let
each of the (currently 8) targets force it into registers individually,
giving the targets better control on if it does that and when and allowi
