Perform V2SI vector permutation in the same way as existing V2SF for TARGET_MMX_WITH_SSE targets. The testcase:
typedef unsigned int v2si __attribute__((vector_size(8))); v2si foo(v2si x, v2si y) { return (v2si){y[0], x[1]}; } is currently compiled to (-O2): foo: movdqa %xmm0, %xmm2 movdqa %xmm1, %xmm0 pshufd $0xe5, %xmm2, %xmm2 punpckldq %xmm2, %xmm0 ret and with the patched compiler: foo: movss %xmm1, %xmm0 ret The functionality is already tested in gcc.target/i386/vperm-v2si.c gcc/ChangeLog: * config/i386/i386-expand.cc (expand_vec_perm_movs): Handle V2SImode for TARGET_MMX_WITH_SSE. * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss using V2FI mode iterator to handle both V2SI and V2SF modes. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros.
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 1094ece8b6d..6cc8bd5c80c 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -18949,11 +18949,9 @@ expand_vec_perm_movs (struct expand_vec_perm_d *d) if (d->one_operand_p) return false; - if (!(TARGET_SSE && vmode == V4SFmode) - && !(TARGET_SSE && vmode == V4SImode) - && !(TARGET_MMX_WITH_SSE && vmode == V2SFmode) - && !(TARGET_SSE2 && vmode == V2DFmode) - && !(TARGET_SSE2 && vmode == V2DImode)) + if (!(TARGET_SSE && (vmode == V4SFmode || vmode == V4SImode)) + && !(TARGET_MMX_WITH_SSE && (vmode == V2SFmode || vmode == V2SImode)) + && !(TARGET_SSE2 && (vmode == V2DFmode || vmode == V2DImode))) return false; /* Only the first element is changed. */ diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 0deccc2d2f4..f9c66115f81 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1518,11 +1518,11 @@ (set_attr "prefix" "*,maybe_vex,orig") (set_attr "mode" "DI,V4SF,V4SF")]) -(define_insn "*mmx_movss" - [(set (match_operand:V2SF 0 "register_operand" "=x,v") - (vec_merge:V2SF - (match_operand:V2SF 2 "register_operand" " x,v") - (match_operand:V2SF 1 "register_operand" " 0,v") +(define_insn "*mmx_movss_<mode>" + [(set (match_operand:V2FI 0 "register_operand" "=x,v") + (vec_merge:V2FI + (match_operand:V2FI 2 "register_operand" " x,v") + (match_operand:V2FI 1 "register_operand" " 0,v") (const_int 1)))] "TARGET_MMX_WITH_SSE" "@