Hi!
On Mon, Feb 27, 2023 at 08:11:09PM +0100, Jakub Jelinek wrote:
> (insn 52 48 53 2 (set (reg:CC 66 cc)
> (compare:CC (reg:SI 130)
> (const_int 0 [0]))) "pr108803.c":12:25 437 {cmpsi}
> (expr_list:REG_DEAD (reg:SI 130)
> (expr_list:REG_EQUAL (compare:CC
On Mon, Feb 27, 2023 at 09:54:06PM +0100, Jakub Jelinek wrote:
> Even if the target-independent code doesn't know what the target dependent
> code will do, I don't see how it could emit it safely.
I always understood RTL to not have anything like C "undefined
behavior", but be closer in general
On Mon, Feb 27, 2023 at 09:01:15PM +, Richard Sandiford via Gcc-patches
wrote:
> Jakub Jelinek writes:
> > On Mon, Feb 27, 2023 at 08:43:27PM +, Richard Sandiford wrote:
> >> My argument was that !SHIFT_COUNT_TRUNCATED and
> >> C?Z_DEFINED_VALUE_AT_ZERO==0 mean that the behaviour is
Jakub Jelinek writes:
> On Mon, Feb 27, 2023 at 08:43:27PM +, Richard Sandiford wrote:
>> My argument was that !SHIFT_COUNT_TRUNCATED and
>> C?Z_DEFINED_VALUE_AT_ZERO==0 mean that the behaviour is undefined
>> only in the sense that target-independent code doesn't know what
>> the behaviour
On Mon, Feb 27, 2023 at 08:43:27PM +, Richard Sandiford wrote:
> My argument was that !SHIFT_COUNT_TRUNCATED and
> C?Z_DEFINED_VALUE_AT_ZERO==0 mean that the behaviour is undefined
> only in the sense that target-independent code doesn't know what
> the behaviour is. !SHIFT_COUNT_TRUNCATED
Jakub Jelinek writes:
> On Mon, Feb 27, 2023 at 07:51:21PM +, Richard Sandiford wrote:
>> I think RTL and gimple are different in that respect.
>> SHIFT_COUNT_TRUNCATED's effect on shifts is IMO a bit like
>> CTZ_DEFINED_VALUE_AT_ZERO's effect on CTZ: it enumerates common
>> target-specific
On Mon, Feb 27, 2023 at 07:51:21PM +, Richard Sandiford wrote:
> I think RTL and gimple are different in that respect.
> SHIFT_COUNT_TRUNCATED's effect on shifts is IMO a bit like
> CTZ_DEFINED_VALUE_AT_ZERO's effect on CTZ: it enumerates common
> target-specific behaviour, but doesn't turn
Jakub Jelinek writes:
> On Mon, Feb 27, 2023 at 03:34:11PM +, Richard Sandiford wrote:
>> > The following testcase is miscompiled on aarch64. The problem is that
>> > aarch64 with TARGET_SIMD is !SHIFT_COUNT_TRUNCATED target with
>> > targetm.shift_truncation_mask (DImode) == 0 which has
On Mon, Feb 27, 2023 at 03:34:11PM +, Richard Sandiford wrote:
> > The following testcase is miscompiled on aarch64. The problem is that
> > aarch64 with TARGET_SIMD is !SHIFT_COUNT_TRUNCATED target with
> > targetm.shift_truncation_mask (DImode) == 0 which has HAVE_conditional_move
> > true.
Jakub Jelinek writes:
> Hi!
>
> The following testcase is miscompiled on aarch64. The problem is that
> aarch64 with TARGET_SIMD is !SHIFT_COUNT_TRUNCATED target with
> targetm.shift_truncation_mask (DImode) == 0 which has HAVE_conditional_move
> true. If a doubleword shift (in this case
Hi!
The following testcase is miscompiled on aarch64. The problem is that
aarch64 with TARGET_SIMD is !SHIFT_COUNT_TRUNCATED target with
targetm.shift_truncation_mask (DImode) == 0 which has HAVE_conditional_move
true. If a doubleword shift (in this case TImode) doesn't have its own
expander
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