The following makes sure we're not taking the address of hard registers when vectorizing appearant gathers or scatters to/from them.
Bootstrapped and tested on x86_64-unkown-linux-gnu, pushed. PR tree-optimization/113670 * tree-vect-data-refs.cc (vect_check_gather_scatter): Make sure we can take the address of the reference base. * gcc.target/i386/pr113670.c: New testcase. --- gcc/testsuite/gcc.target/i386/pr113670.c | 16 ++++++++++++++++ gcc/tree-vect-data-refs.cc | 5 +++++ 2 files changed, 21 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr113670.c diff --git a/gcc/testsuite/gcc.target/i386/pr113670.c b/gcc/testsuite/gcc.target/i386/pr113670.c new file mode 100644 index 00000000000..8b9d3744fe2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr113670.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-msse2 -O2 -fno-vect-cost-model" } */ + +typedef float __attribute__ ((vector_size (16))) vec; +typedef int __attribute__ ((vector_size (16))) ivec; +ivec x; + +void +test (void) +{ + register vec a asm("xmm3"), b asm("xmm4"); + register ivec c asm("xmm5"); + for (int i = 0; i < 4; i++) + c[i] = a[i] < b[i] ? -1 : 1; + x = c; +} diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc index f592aeb8028..e6a3035064b 100644 --- a/gcc/tree-vect-data-refs.cc +++ b/gcc/tree-vect-data-refs.cc @@ -4325,6 +4325,11 @@ vect_check_gather_scatter (stmt_vec_info stmt_info, loop_vec_info loop_vinfo, if (!multiple_p (pbitpos, BITS_PER_UNIT)) return false; + /* We need to be able to form an address to the base which for example + isn't possible for hard registers. */ + if (may_be_nonaddressable_p (base)) + return false; + poly_int64 pbytepos = exact_div (pbitpos, BITS_PER_UNIT); if (TREE_CODE (base) == MEM_REF) -- 2.35.3