Re: [PATCH] x86: Allow V1TI vector register pushes

2020-05-17 Thread H.J. Lu via Gcc-patches
x) > > +{ > > + if (x != *c) > > +abort (); > > + if (!count) > > +{ > > + count++; > > + longjmp (buf, 1); > > +} > > +} > > + > > +__attribute__ ((noclone, noinline)) > > +void > > +bar (void) &g

Re: [PATCH] x86: Allow V1TI vector register pushes

2020-05-17 Thread Uros Bizjak via Gcc-patches
On Sat, May 16, 2020 at 8:13 PM H.J. Lu wrote: > > On Fri, May 15, 2020 at 11:21:30AM +0200, Uros Bizjak wrote: > > On Wed, May 13, 2020 at 5:58 PM H.J. Lu wrote: > > > > > > > > The question is, why STV pass creates its funny sequence? The > > > > > > original > > > > > > sequence should be

[PATCH] x86: Allow V1TI vector register pushes

2020-05-16 Thread H.J. Lu via Gcc-patches
On Fri, May 15, 2020 at 11:21:30AM +0200, Uros Bizjak wrote: > On Wed, May 13, 2020 at 5:58 PM H.J. Lu wrote: > > > > > > The question is, why STV pass creates its funny sequence? The original > > > > > sequence should be easily solved by storing DImode from XMM register > > > > > and (with