[PATCH] x86: Check mode of pseudo register push

2020-12-06 Thread H.J. Lu via Gcc-patches
commit 266f44a91c0c9705d3d18e82d7c5bab32927a18f Author: H.J. Lu Date: Sun May 17 10:10:34 2020 -0700 x86: Allow V1TI vector register pushes Add V1TI vector register push and split it after reload to a sequence of: (set (reg:P SP_REG) (plus:P SP_REG) (const_int -8))) (set (

Re: [PATCH] x86: Check mode of pseudo register push

2020-12-06 Thread Uros Bizjak via Gcc-patches
On Sun, Dec 6, 2020 at 7:51 PM H.J. Lu wrote: > > commit 266f44a91c0c9705d3d18e82d7c5bab32927a18f > Author: H.J. Lu > Date: Sun May 17 10:10:34 2020 -0700 > > x86: Allow V1TI vector register pushes > > Add V1TI vector register push and split it after reload to a sequence > of: > >

V2 [PATCH] x86: Check mode of pseudo register push

2020-12-06 Thread H.J. Lu via Gcc-patches
_DEST (set), GET_MODE (SET_DEST (set > > && push_operand (SET_DEST (set), mode) > > instead? > > push_operand checks the mode by itself: > > --q-- > int > push_operand (rtx op, machine_mode mode) > { > if (!MEM_P (op)) > return 0; > &g

Re: V2 [PATCH] x86: Check mode of pseudo register push

2020-12-06 Thread Uros Bizjak via Gcc-patches
On Sun, Dec 6, 2020 at 8:11 PM H.J. Lu wrote: > > On Sun, Dec 6, 2020 at 10:59 AM Uros Bizjak wrote: > > > > On Sun, Dec 6, 2020 at 7:51 PM H.J. Lu wrote: > > > > > > commit 266f44a91c0c9705d3d18e82d7c5bab32927a18f > > > Author: H.J. Lu > > > Date: Sun May 17 10:10:34 2020 -0700 > > > > > >